Create vcd file from raw data

Discussion in 'Hardware' started by avinashthakare, Dec 7, 2009.

  1. avinashthakare

    avinashthakare

    Joined:
    Dec 7, 2009
    Messages:
    1
    Likes Received:
    0
    Hi All,

    I running design on FPGA and the output data of design is dumped on my host machine as raw data.
    For example : design has 2 outputs "a" & "b".
    and on every clock a & b data in dumped on host machine as shown below.
    ######
    MSB represents "a" & LSB represents "b"
    ######
    10 -->first rising edge of clock
    01 -->second rising edge of clock
    11
    00
    10
    11
    ######

    I would like to know if you have script which converts this raw data into vcd file so it can be viewed in modelsim or anyother simulation which supports this format.

    Thanks
    Avinash
     
    avinashthakare, Dec 7, 2009
    #1
    1. Advertisements

Ask a Question

Want to reply to this thread or ask your own question?

You'll need to choose a username for the site, which only take a couple of moments (here). After that, you can post your question and our members will help you out.