Address Bus and External Data Bus Confusion

I probably don't really need to know this, but I'm not quite
understanding exactly how the address bus, external data bus, and
banking work together. This is what I know so far:

The address bus is used to communicate with the MCC, the MCC interfaces
with RAM. Lets pretend we have a 32 bit address bus and 64 bit external
data bus. Is the address bus used as a one way conversation where the
CPU basically tells the MMC what line of memory it wants, and the MMC
dumps the data on the much wider external data bus back to the CPU? This
would sorta make sense...on the other hand, if the address bus was a 2
way conversation (where the CPU's requested data travels back down the
address bus, I'd begin to wonder why banking was based around the width
of the external data bus rather than the address bus.

My 2nd Curious George question revolves around the latest 64 bit
processors, in particular AMD's. From what I understand the classic way
of making a "true" 32 bit processor was 32 registers, 32 bit addy bus,
and 32 bit external data bus. So all modern processors have the 64 bit
external data bus, so I assume that the AMD 64 has a 64 bit address bus
and 64 registers...but then it gets a tad hazy because of the integrated
chipset. I google for a bit looking for specifics and found some stat
sheet that listed it as having 40 address bus tracers?? I think they
also listed the Pentium Pro has having a 36 bit address bus...I noticed
other sites had the same info, at least the strange 36 bit Pentium Pro
specs. My books says 32.

 

sheesh, I figured somebody here would have had a nice explanation!