Using BRAM in state machines

Discussion in 'Hardware' started by zoki111, Sep 18, 2007.

  1. zoki111

    zoki111

    Joined:
    Sep 18, 2007
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    There is a switch in Xilinx devices (fsm_style) which can utilize memory elements for state machines. This can be very useful when having leftover brams in a design.

    However, there is very little information about using brams for this purpose. The best info I have yet found is http://www.xilinx.com/xlnx/xweb/xil_tx_display.jsp?sTechX_ID=pa_leftover , which does not include concrete examples or “good to know” tips.

    Some parameters are very important like number of inputs to the state machine and so on. More than 7 or 8 inputs renders 1 or 2 extra bram blocks, which is less than optimal.

    The question is: how to write state machines (mapping to brams) to save as much space (luts/slices) as possible?

    In the xilinx documentation it says that large state machines can be mapped to brams to save space. The term large or big is somewhat vague.

    Some input on this?

    Examples are appreciated. Not to mention theory on “normal” state machines and bram state machines.

    /Zoran
     
    zoki111, Sep 18, 2007
    #1
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