synthesizable divide operation in VHDL

Discussion in 'Hardware' started by varshini, Dec 2, 2008.

  1. varshini

    varshini

    Joined:
    Dec 2, 2008
    Messages:
    1
    Using VHDL coding, I have designed a counter to count our pulses and now
    I want to convert the count value into a value and display it in
    the seven segment LED display. For that I have to divide the count value
    by 214 (integer number). But divide operator"/" is not synthesizable. If i
    design a divider circuit, I could not get quotient with decimal values
    because without decimal digits I lose accuracy.

    I have also tried division through multiplication. I found 1/214 = 0.00467
    and multiplied this value with the count value but the multiplication
    operator " * " seems to work only with either two integer values or two
    real values.

    How could I convert my count value which is in STD_LOGIC_VECTOR to a real
    value? I converted the count to integer using conv_integer(unsigned(count
    value)).I am using XILINX8.1i version.

    If I divided the count value with 214, I would convert the decimal result
    to a BCD and display it in Seven segment display.

    Is there any way to divide the count or convert the std_logic_vector to a
    real value?
     
    varshini, Dec 2, 2008
    #1
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