ISDN BRI S/T line-code violation

Discussion in 'Cisco' started by asummit, May 10, 2005.

  1. asummit

    asummit Guest

    hi guys:
    When i read CCNP Remote Access study Guide,it's say that Logic zero
    bits are denoted by the presence of a +1 or -1 volt pulse. Logic one
    bits are denoted by the absence of a pulse. Each logic zero bit will
    alternate in polarity with respect to the previous pulse. A line-code
    violation is declared when two consecutive pulses remain at the same
    polarity.MY question is:in previous figure,on the s/t to nt1
    direction,the DC Bits is -1 pulse,why the first B1 bits can be presence
    of -1 pulse,will not so cause line-code violation?
     
    asummit, May 10, 2005
    #1
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  2. "asummit" <> wrote in message
    news:...
    > When i read CCNP Remote Access study Guide,it's say that Logic zero
    > bits are denoted by the presence of a +1 or -1 volt pulse. Logic one
    > bits are denoted by the absence of a pulse. Each logic zero bit will
    > alternate in polarity with respect to the previous pulse.


    Right. This is called "Alternate Mark Inversion" or "AMI"

    > A line-code
    > violation is declared when two consecutive pulses remain at the same
    > polarity.


    Right, decause it assume you must have missed one.

    > MY question is:in previous figure,on the s/t to nt1
    > direction,the DC Bits is -1 pulse,why the first B1 bits can be presence
    > of -1 pulse,will not so cause line-code violation?


    Uhhhh... What figure? Your question makes no sense.

    Maybe http://support.isot.com/support/isdn-intro.htm will help you? The
    start of frame is marked with an AMI line code violation which ensures there
    is no DC signal and makes a clear start of frame.
     
    Phillip Remaker, May 11, 2005
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  3. asummit

    asummit Guest

    Thanks for you reply,because the group can't display figure,so can i
    send the figure to you by email?
     
    asummit, May 11, 2005
    #3
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