Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > Re: random numbers

Thread Tools

Re: random numbers

Posts: n/a
On Monday, September 16, 2002 10:55:02 AM UTC-5, itsme wrote:
> Hi,I like to write a techbench whichuses random numbers for
> input data to test my hardware.Does VHDL has a built in
> random number generator? Is there any library?


There is a new vhdl library called Open Source VHDL Verification Methodology availabe at, along with user guides, and a support blog & forum..

The library provides mechanisms (protected type function/procedure calls) for constrained random stimulus generation, and functional coverage management. You can even use the coverage management to directly control the randomization constraints in the stimulus generation if desired. It is a great alternative to SystemVerilog UVM.

OSVVM is written and supported by Jim Lewis of Synthworks, who is a frequent poster here, and an ardent supporter of VHDL.

Reply With Quote

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off

Similar Threads
Thread Thread Starter Forum Replies Last Post
FAQ 4.10 Why aren't my random numbers random? PerlFAQ Server Perl Misc 0 04-27-2011 04:00 AM
FAQ 4.10 Why aren't my random numbers random? PerlFAQ Server Perl Misc 0 02-12-2011 11:00 PM
Math.random() and Math.round(Math.random()) and Math.floor(Math.random()*2) VK Javascript 15 05-02-2010 03:43 PM
How do I get a random number between two random numbers? Alex Untitled Ruby 11 11-16-2009 09:45 AM
random.random(), random not defined!? globalrev Python 4 04-20-2008 08:12 AM