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"Alan Fitch" <> wrote in message news: o.uk...
> On 04/03/12 12:41, aleksa wrote:
>> "Alan Fitch" <> wrote in message news:K8WdnZNhR-o-...
>>> On 02/03/12 13:53, aleksa wrote:
>>>> One more question:
>>>>
>>>> ADDR : unsigned(9 downto 0);
>>>> OFFSET : unsigned(4 downto 0);
>>>>
>>>> this is what I want:
>>>> ADDR <= OFFSET + 1000;
>>>>
>>>> this is how I've written it:
>>>> ADDR <= OFFSET + to_unsigned(1000, ADDR'length);
>>>>
>>>> correct?
>>>>
>>>>
>>>
>>> That's not necessary. "+" is overloaded for unsigned + unsigned, natural
>>> + unsigned, unsigned + natural - all returning unsigned. So you can write
>>>
>>> ADDR <= OFFSET + 1000;
>>
>> Width mismatch. <ADDR> has a width of 10 bits but assigned expression is 5-bit wide.
>>
>> In the VHDL math tricks:
>> Y <= A + B; -- Maximum (A'Length, B'Length)
>> Y <= A + 10; -- A'Length
>>
>> Since ISE complains if I just "+ 1000",
>> I wanted to convert "1000" to "B" in the first example.
>>
>> It works, but I don't know if that is the correct approach.
>>
>>
>>
>>
>> BTW, I know that 2^5 is 32 and that 1000+32
>> may overflow 10 bits... but I don't care.
>>
>>
>
> Oops, sorry. Yes of course the widths need to match. I blame a week of
> SystemC coding (and jet lag).
>
> However the + sign itself will resize its arguments to match. So you
> just have to resize one argument. Hence either
>
> ADDR <= resize(OFFSET, ADDR'LENGTH) + 1000;

Great, I didn't know about "resize", thanks!



>
> or (as you originally wrote)
>
> ADDR <= OFFSET + to_unsigned(1000, ADDR'LENGTH);
>
> As you say, ISE might be fussier than the language rules require.
>
> kind regards
> Alan
>
>
> --
> Alan Fitch

Maybe someone will find this useful...

VHDL conversions
http://tinyurl.com/7ww9tvm