truncating std_logic_vector multiplication result question

vivo_m · 02-23-2012

Hi,
I want to multiply two std_logic_vector(7 downto 0),but i want the result to be std_logic_vector(7 downto 0) not std_logic_vector(15 downto 0)..
is there any idea how can i do this??

joris · 02-25-2012

I think you can simply have,

Code:

variable x, y : unsigned(7 downto 0);
variable z : unsigned(7 downto 0);

z := x * y; -- drops 8 most significant bits

Similar Threads
Thread	Thread Starter	Forum	Replies	Last Post
Source of term "multiplication" in matrix multiplication	William Hughes	C Programming	13	03-15-2010 02:04 PM
inout std_logic_vector to array of std_logic_vector of generic length conversion...	Thomas Rouam	VHDL	6	11-09-2007 11:49 AM
1. Ruby result: 101 seconds , 2. Java result:9.8 seconds, 3. Perl result:62 seconds	Michael Tan	Ruby	32	07-21-2005 03:23 PM
Truncating Variables	Jason Williard	ASP .Net	11	10-18-2004 01:27 PM
System.web.mail truncating message body - strange behaviour ??	Jitesh Sinha	ASP .Net	1	12-05-2003 03:04 PM