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Blocking queue race condition?

Andrew Tomazos
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On Jan 8, 11:02*pm, "Chris M. Thomasson" <(E-Mail Removed)> wrote:
> So, assuming that `sem_post/wait' have at least 1 atomic RMW each, I am
> counting:
> 5 atomic RMW for push and 5 atomic RMW for pop... Memory barriers aside for
> a moment...

The original (faulty) design had 3 atomics (CMPXCHG, XADD, CMPXCHG)
for push and the same for pop in the uncontended case.

> Even in the presence of ZERO contention, how can this possibly perform
> better than a simple condvar/mutex setup?

If by simple "condvar/mutex setup", you mean one giant lock for the
whole queue, consider that the real queue may have a complex
constructor and/or a large value type. A single lock forces
unnecessary serialization of readers and writers. Ideally you would
like readers and writers to have access to different cells in

> The condvar/mutex will be using far less atomic RMW and memory barriers.

sem_post and sem_wait are implemented with a CMPXCHG in the
uncontended case on my target platform (x86_64 linux).
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