Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > Re: Conversion of sequential time-sensitive algorithm to VHDL

Reply
Thread Tools

Re: Conversion of sequential time-sensitive algorithm to VHDL

 
 
Oliver Mattos
Guest
Posts: n/a
 
      02-03-2011
Hi,

Thanks very much for your responses! I think I'll try both approaches, and see which comes out faster/less area.

Thanks
Oliver
 
Reply With Quote
 
 
 
Reply

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
Sequential microprocessor code to vhdl - easy conversion tips? Oliver Mattos VHDL 6 04-05-2011 01:21 AM
Conversion of sequential time-sensitive algorithm to VHDL Oliver Mattos VHDL 8 02-12-2011 03:40 AM
Re: Conversion of sequential time-sensitive algorithm to VHDL Oliver Mattos VHDL 1 02-05-2011 12:49 AM
vhdl testbench sequential JSreeniv VHDL 4 11-17-2009 09:52 PM
VHDL newbie: building sequential circuits with basic gates GomoX VHDL 19 05-22-2007 01:17 PM



Advertisments
 



1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57