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The Programmable Logic and FPGA Design Stack (from the creators of
Stack Overflow, but specific to FPGAs) has finally gotten past the
definition phase and is now in the commit phase. To reach a phase were
we can use it we need more people to commit to using it. As VHDL and
Verilog are the two main FPGA development languages it's likely many
people here will be interested. Please commit to supporting it as soon
as possible as sites that don't get enough attention are canceled.

http://area51.stackexchange.com/prop...qGFAaI1gMp5oQ2

Best Regards,
Jonathan Ross