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lccwin fails to generate NOPs

 
 
Eric Sosman
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      01-05-2011
On 1/5/2011 7:36 AM, BartC wrote:
> "glen herrmannsfeldt" <(E-Mail Removed)> wrote in message
> news:ig0ukn$c16$(E-Mail Removed)-september.org...
>
>> Then there is the PDP-10.

>
> Not exactly common these days...
>
> I am not sure which instruction is
>> the official NOP, but there are the JUMP and SKIP with the
>> descriptions "Don't JUMP" and "Don't SKIP", respectively.

>
> There was SKIPN and (iirc) JUMPN. SKIPN did seem a bit pointless, but it
> was
> just a consequence of a particular pattern of condition codes.
>
> In the same way many processors will have the apparently pointless
> instructions MOV Rn,Rn, or EXCH Rn,Rn, otherwise there would be an untidy
> hole in the opcode map.
>
> As I said, there are various ways of constructing a no-op instruction, so
> which one should be generated from an empty C statement? (Although this is
> the first I've heard of such a statement having to generate a NOP
> instruction.)


As has been pointed out, no C statement "has to" generate any
particular instruction. Must an expression involving multiplication
use a MUL instruction? No: Maybe it can use a shift, maybe it can
use a combination of shifts and adds, maybe it can strength-reduce
the operator and use an add alone. Maybe the compiler can determine
that the result of the multiplication is never used, and throw the
whole thing away.

The important thing is that whatever code is generated must carry
out the actions expressed by the C source (if the source code has a
defined meaning). The means by which those actions are carried out is
entirely up to the implementation. The O.P.'s source code called for
"no action," and the implementation has done what it was told to do,
that is, nothing. <BANG> Next case.

--
Eric Sosman
http://www.velocityreviews.com/forums/(E-Mail Removed)lid
 
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Chris H
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      01-05-2011
In message <ig08et$mju$(E-Mail Removed)>, Edward Rutherford
<(E-Mail Removed)> writes
>Ben Pfaff wrote:
>> jacob navia <(E-Mail Removed)> writes:
>>
>>> Le 04/01/11 23:30, Edward Rutherford a écrit :
>>>> I am trying to write code that includes a certain number of NOPs in
>>>> the generated machine code, I would like to do it portably so without
>>>> using inline asm.
>>>
>>> I can develop a special version FOR YOU that will emit a NOP when you
>>> write an empty statemnt.

>>
>> A special version of lcc-win will not be a portable solution.

>
>True - perhaps C needs a new nop keyword to be added.


No no no no

See the discussion on c99. They are already removing (making "optional"
) previous "Good Ideas". If you need a delay a space you need to do it
properly in ASM.

>Jacob is obviously joking about "pricing"


Why? It is his time and expertise for a one off for you. It's called
consultancy

>- this would be a very easy
>fix, only a few minutes work,


Really? And the full set of regression tests?

> and I would suggest having a compile time
>option so that all users of lcc can choose how they want C empty
>statements to be translated, in case some of them prefer the old
>behaviour.


Well up to now only you want it so it would be a case of you turning it
on whilst the others did it properly.

BTW the Dark Star 9000 does not have a NOP so what would you implement
instead?

--
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Keith Thompson
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      01-05-2011
"BartC" <(E-Mail Removed)> writes:
[...]
> As I said, there are various ways of constructing a no-op instruction, so
> which one should be generated from an empty C statement?


None of them.

> (Although this is
> the first I've heard of such a statement having to generate a NOP
> instruction.)


And the OP still hasn't given us a clue about *why* he needs NOP
instructions.

--
Keith Thompson (The_Other_Keith) (E-Mail Removed) <http://www.ghoti.net/~kst>
Nokia
"We must do something. This is something. Therefore, we must do this."
-- Antony Jay and Jonathan Lynn, "Yes Minister"
 
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glen herrmannsfeldt
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      01-05-2011
In comp.compilers.lcc BartC <(E-Mail Removed)> wrote:
> "glen herrmannsfeldt" <(E-Mail Removed)> wrote in message
> news:ig0ukn$c16$(E-Mail Removed)-september.org...


>> Then there is the PDP-10.


> Not exactly common these days...


There are a few emulators around, and software to run on them.

It might not take so long to port LCC to the PDP-10.

> I am not sure which instruction is
>> the official NOP, but there are the JUMP and SKIP with the
>> descriptions "Don't JUMP" and "Don't SKIP", respectively.


> There was SKIPN and (iirc) JUMPN. SKIPN did seem a bit pointless,
> but it was just a consequence of a particular pattern of
> condition codes.


SKIPN and JUMPN are skip and jump if ACis Not zero.

The fun thing about the PDP-10 is that the suffix indicates the
condition, and no suffix means don't do anything. The unconditional
skip and jump are SKIPA and JUMPA.

> In the same way many processors will have the apparently pointless
> instructions MOV Rn,Rn, or EXCH Rn,Rn, otherwise there would be an
> untidy hole in the opcode map.


As I wrote, the IA32 NOP goes where EXCH AX,AX goes.
I believe the 8080 NOP is also an EXCH instruction. I don't know
why EXCH instead of MOV, though.

> As I said, there are various ways of constructing a no-op
> instruction, so which one should be generated from an
> empty C statement? (Although this is the first I've heard
> of such a statement having to generate a NOP instruction.)


It seems that some might expect it in the lowest optimization
case, though that does seem unusual.

-- glen
 
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Seebs
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      01-05-2011
On 2011-01-05, BartC <(E-Mail Removed)> wrote:
> As I said, there are various ways of constructing a no-op instruction, so
> which one should be generated from an empty C statement? (Although this is
> the first I've heard of such a statement having to generate a NOP
> instruction.)


http://www.seebs.net/faqs/c-iaq.html#section-4

4.3: Is there more than one null statement?

Sort of. You can use ``;'', ``0;'', or ``1;'' - they will all act like
a null statement. Only the first is a ``true'' null statement (all
bits zero). They are basically equivalent. Note that (void *) 0; is a
null statement of type pointer to void, for instance.

-s
--
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http://www.seebs.net/log/ <-- lawsuits, religion, and funny pictures
http://en.wikipedia.org/wiki/Fair_Game_(Scientology) <-- get educated!
I am not speaking for my employer, although they do rent some of my opinions.
 
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robertwessel2@yahoo.com
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      01-05-2011
On Jan 5, 1:31*pm, glen herrmannsfeldt <(E-Mail Removed)> wrote:
> In comp.compilers.lcc BartC <(E-Mail Removed)> wrote:
>
> > "glen herrmannsfeldt" <(E-Mail Removed)> wrote in message
> >news:ig0ukn$c16$(E-Mail Removed)-september.org...
> >> Then there is the PDP-10.

> > Not exactly common these days...

>
> There are a few emulators around, and software to run on them.
>
> It might not take so long to port LCC to the PDP-10.
>
> > *I am not sure which instruction is
> >> the official NOP, but there are the JUMP and SKIP with the
> >> descriptions "Don't JUMP" and "Don't SKIP", respectively.

> > There was SKIPN and (iirc) JUMPN. SKIPN did seem a bit pointless,
> > but it was just a consequence of a particular pattern of
> > condition codes.

>
> SKIPN and JUMPN are skip and jump if ACis Not zero.
>
> The fun thing about the PDP-10 is that the suffix indicates the
> condition, and no suffix means don't do anything. *The unconditional
> skip and jump are SKIPA and JUMPA.
>
> > In the same way many processors will have the apparently pointless
> > instructions MOV Rn,Rn, or EXCH Rn,Rn, otherwise there would be an
> > untidy hole in the opcode map.

>
> As I wrote, the IA32 NOP goes where EXCH AX,AX goes.
> I believe the 8080 NOP is also an EXCH instruction. *I don't know
> why EXCH instead of MOV, though.


"mov ax,ax" is two bytes, "xchg ax,ax" is one.
 
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BartC
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      01-05-2011
"glen herrmannsfeldt" <(E-Mail Removed)> wrote in message
news:ig2gur$p5f$(E-Mail Removed)-september.org...
> In comp.compilers.lcc BartC <(E-Mail Removed)> wrote:
>> "glen herrmannsfeldt" <(E-Mail Removed)> wrote in message
>> news:ig0ukn$c16$(E-Mail Removed)-september.org...

>
>>> Then there is the PDP-10.

>
>> Not exactly common these days...

>
> There are a few emulators around, and software to run on them.


Interesting. But there might still be a problem with the 18-bit addressing
restricting memory to 256K words, or just over 1MB, per task, which some
might find it challenging now. (And on our first machine, that was all the
physical memory there was. Still managed to support up to 160 simultaneous
users though; some machines with 1 or 2 GB now have trouble with just one
user...)

> It might not take so long to port LCC to the PDP-10.
>
>> I am not sure which instruction is
>>> the official NOP, but there are the JUMP and SKIP with the
>>> descriptions "Don't JUMP" and "Don't SKIP", respectively.

>
>> There was SKIPN and (iirc) JUMPN. SKIPN did seem a bit pointless,
>> but it was just a consequence of a particular pattern of
>> condition codes.

>
> SKIPN and JUMPN are skip and jump if ACis Not zero.


> The fun thing about the PDP-10 is that the suffix indicates the
> condition, and no suffix means don't do anything. The unconditional
> skip and jump are SKIPA and JUMPA.


I misremembered the N as meaning Never. And looking at some details now, the
SKIP instruction sets a condition code, but JUMP doesn't, so would be better
as a no-op. (Skip and Jump in a program listing does make it sound fun
though..)

>> In the same way many processors will have the apparently pointless
>> instructions MOV Rn,Rn, or EXCH Rn,Rn, otherwise there would be an
>> untidy hole in the opcode map.

>
> As I wrote, the IA32 NOP goes where EXCH AX,AX goes.
> I believe the 8080 NOP is also an EXCH instruction. I don't know
> why EXCH instead of MOV, though.


On x86, EXCH (or XCHG) EAX,EAX is a single byte. Using other registers, or a
MOV, seems to need two bytes.

A single byte no-op is better for fine control of alignment and such.

--
Bartc

 
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robertwessel2@yahoo.com
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      01-05-2011
On Jan 5, 8:55*am, Kenneth Brody <(E-Mail Removed)> wrote:
> On 1/4/2011 8:57 PM, (E-Mail Removed) wrote:
> [...]
>
> > In the same vein, both Intel and IBM have defined explicit undefined
> > instructions. *Intel even gave it a mnemonic.

>
> Well, by giving it a mnemonic, they've "reserved" that opcode more strongly
> than simply saying "don't use it".



IBM's statement is a bit stronger than that. For the PofO: "Operation
code 00 hex will never be assigned to an instruction implemented in
the CPU."


> Unlike, as I recall, when the 8086 first came out, one of the interrupt
> vectors was marked by Intel as "reserved" or "unused". *IBM, in their
> infinite wisdom, decided to use that interrupt as their "print screen"
> handler. *Along comes the 80286, and Intel now uses that interrupt for some
> hardware trap, leaving BIOS writers with the task of deciding "was this a
> hardware trap, or a software-generated interrupt meant to 'print screen'?"



Actually Intel reserved everything below 0x20, so all of the BIOS
calls and the normal real mode vectors for IRQ0-7 are in that range.
 
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glen herrmannsfeldt
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      01-05-2011
In comp.compilers.lcc BartC <(E-Mail Removed)> wrote:
(snip, I wrote)

>>>> Then there is the PDP-10.


>>> Not exactly common these days...


>> There are a few emulators around, and software to run on them.


> Interesting. But there might still be a problem with the 18-bit addressing
> restricting memory to 256K words, or just over 1MB, per task, which some
> might find it challenging now. (And on our first machine, that was all the
> physical memory there was. Still managed to support up to 160 simultaneous
> users though; some machines with 1 or 2 GB now have trouble with just one
> user...)


I believe that was fixed in the later processors, but I never wrote
assembly code for them, so I am not so sure how it works.

(snip)

>> SKIPN and JUMPN are skip and jump if ACis Not zero.


>> The fun thing about the PDP-10 is that the suffix indicates the
>> condition, and no suffix means don't do anything. The unconditional
>> skip and jump are SKIPA and JUMPA.


> I misremembered the N as meaning Never. And looking at some


It is, at least, for the 6809. Maybe other Morotola processors, too.

> details now, the SKIP instruction sets a condition code,
> but JUMP doesn't, so would be better as a no-op.
> (Skip and Jump in a program listing does make it sound fun though..)


I presume there is an assembler generated NOP, but I don't know
what it is. The hardware manual doesn't explain that one.

(snip)

> On x86, EXCH (or XCHG) EAX,EAX is a single byte. Using other
> registers, or a MOV, seems to need two bytes.


Oh, yes. Now I remember it...

> A single byte no-op is better for fine control of alignment and such.


Like the OS/360 CNOP.

-- glen

 
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BGB
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      01-05-2011
On 1/4/2011 4:27 PM, glen herrmannsfeldt wrote:
> In comp.compilers.lcc BartC<(E-Mail Removed)> wrote:
> (snip)
>
>> I'm not sure the concept of Nop is even portable...

>
> Some machines have more than one...
>


yep...

x86 provides additional nop-forms, mostly so that one can fill more
space with only a single instruction if needed.

there are also "nop [mem]" forms, which I have been using informally as
a machine-code annotation mechanism (the memory address can be pointed
to any relevant metadata, and any code which happens to be looking at
the code can identify the opcode and see if it points at anything relevant).


>> Did you have a particular machine instruction in mind, for every conceivable
>> machine? If not then it probably doesn't matter what instructions are
>> generated; maybe you can even use some actual C code.

>
> The favorite problem when writing benchmarks, of making sure that
> the compiler doesn't optimize away the operations. How about
>
> i += 0;
>
> i *= 1;
>
> i /= 1;
>
> with no optimization, how many compilers will generate the
> specified operation?
>


dunno, I usually use a few tricks involving do-nothing function calls,
and trying to avoid the compiler figuring out that the function call
does nothing.

IIRC, I have seen function calls with inline ASM for these sorts of
tasks, ...

a __nop keyword almost makes sense, since if-anything, it can tell the
compiler not to optimize it away... (vs the compiler doing its best to
figure out that "some function in another compilation unit accessed via
a function pointer and performing a few global variable assignments" is
in-fact no-op...).
 
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