Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > VHDL statement execution order

Thread Tools

VHDL statement execution order

mreister mreister is offline
Junior Member
Join Date: Aug 2008
Posts: 10
Ok, I am still learning VHDL and I am having some problems with execution order of statements. Take for example the following code:

entity add_w_carry is
a,b: in std_logic_vector(3 downto 0);
cout: out std_logic;
sum: out std_logic_vector(3 downto 0);
end add_w_carry;

architecture hard_arch of add_w_carry is
signal a_ext, b_ext,sum_ext: unsigned(4 downto 0);

a_ext <= unsigned('0' & a);
b_ext <= unsigned('0' & b);
sum_ext <= a_ext + b_ext;
end hard_arch

Now I know this code is suppose to take the input a,b and extended them by one bit then add them together. But where I am a little fuzzy is the order in which this happens. I thought since this is a combinational circuit all these statements execute in parallel but this would mean that the addition would happen before a_ext and b_ext where evaluated. Obviously its suppose to evaluate a_ext and b_ext first but how do the synthesis tools know to evaluate this statement in the correct order? What if I wanted all three statements to execute in parallel?
Reply With Quote
jeppe jeppe is offline
Senior Member
Join Date: Mar 2008
Location: Denmark
Posts: 348
Well - talking about concurrent statements (as in your example). They will be executed in the order they are needed when they are needed.

In contrast will the statements inside a process be executed in the order they are writen (like a computerprogram).

Search the net for the interactive book: "Evita VHDL" - chapter 6 + 7 will explain it all.


Last edited by jeppe; 05-17-2010 at 12:59 PM..
Reply With Quote

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off

Similar Threads
Thread Thread Starter Forum Replies Last Post
JDBC: Problem with execution of SQL Statement Sameer Java 3 06-15-2010 01:11 PM
Mismatch in Statement and PreparedStatement execution in Oracle DB. Alex Kizub Java 10 02-11-2010 09:20 PM
private data stashed in local/global execution context of PyEval_EvalCode disappears down the execution stack Python 9 11-14-2007 10:31 PM
VHDL-2002 vs VHDL-93 vs VHDL-87? afd VHDL 1 03-23-2007 09:33 AM
doubt in FLI Program and order of execution priya VHDL 0 10-03-2005 12:55 PM