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Multiplier 12 bit architecture !!!

 
 
charko charko is offline
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Join Date: Apr 2010
Posts: 10
 
      04-30-2010
Hi! I want to implement a multiplier 12 bit in vhdl structural . My application needs very fast architecture but i want to know what architecture of multiplier can be used .

Thank you very much .
 
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jeppe jeppe is offline
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Join Date: Mar 2008
Location: Denmark
Posts: 348
 
      05-06-2010
The best way to get a fast multiplication will be a fixed, integrated multiplier as it can be found in most FPGA's.

But in order to get more information check this site:
users-tima.imag.fr/cis/guyot/Cours/Oparithm/english/Multip.htm

your welcome
 
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charko charko is offline
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Join Date: Apr 2010
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      05-07-2010
Quote:
Originally Posted by jeppe
The best way to get a fast multiplication will be a fixed, integrated multiplier as it can be found in most FPGA's.

But in order to get more information check this site:
users-tima.imag.fr/cis/guyot/Cours/Oparithm/english/Multip.htm

your welcome

OK!Thank you very much for your help
Charko
 
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