Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > soustractor 12 bit vhdl ?

Reply
Thread Tools

soustractor 12 bit vhdl ?

 
 
charko charko is offline
Junior Member
Join Date: Apr 2010
Posts: 10
 
      04-27-2010
Hi i am a new designer in vhdl and i want to write a vhdl code soustractor 12 bit. I want to do it in vhdl structural and at first i create an adder 12 bit in i want to use this adder to create soustractor 12 bit. My idea is i should use complement two for the second operand ( A - B = A + (-B)).

My question is : How can i create a structural vhdl code for soustractor 12 bit ?

Thank you very much !

Charko

NB: Sorry for my bad english!!
 
Reply With Quote
 
 
 
 
charko charko is offline
Junior Member
Join Date: Apr 2010
Posts: 10
 
      04-27-2010
I think i resolve this problem!

The vhdl code that i write to do that is :
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;[IMG]htpp:\\C:\Users\bomar\Desktop\image[/IMG]
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity soustr12 is
Port ( a : in STD_LOGIC_VECTOR (11 downto 0);
b : in STD_LOGIC_VECTOR (11 downto 0);
s : out STD_LOGIC_VECTOR (11 downto 0));
end soustr12;

architecture structural of soustr12 is
component add12
port ( a : in std_logic_vector(11 downto 0 );
b: in std_logic_vector(11 downto 0) ;
s: out std_logic_vector(11 downto 0);
Cout: out std_logic);
end component ;
signal q : std_logic_vector( 11 downto 0 );


begin
q(11 downto 0) <= (not B(11 downto 0) ) + 1 ;
inst1 : add12 port map ( a(11 downto 0)=> a( 11 downto 0),
b( 11 downto 0)=> q(11 downto 0),
s( 11 downto 0)=> s (11 downto 0));
end structural;
----------------------------------------------------------------------------
I think that is rigth because the test bench give me a good result.
 
Reply With Quote
 
 
 
 
joris joris is offline
Senior Member
Join Date: Jan 2009
Posts: 152
 
      04-28-2010
If you're really looking for a structural solution, wouldn't you prefer to have a carry-in of 1 instead of adding 1 before-hand, and pass in 'not B'?
That could save a full adder for the incrementing.
 
Reply With Quote
 
charko charko is offline
Junior Member
Join Date: Apr 2010
Posts: 10
 
      04-30-2010
Quote:
Originally Posted by joris
If you're really looking for a structural solution, wouldn't you prefer to have a carry-in of 1 instead of adding 1 before-hand, and pass in 'not B'?
That could save a full adder for the incrementing.


hi Joris. ok i try it !!


Charko
 
Reply With Quote
 
 
 
Reply

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
What is the point of having 16 bit colour if a computer monitor can only display 8 bit colour? How do you edit 16 bit colour when you can only see 8 bit? Scotius Digital Photography 6 07-13-2010 03:33 AM
VHDL-2002 vs VHDL-93 vs VHDL-87? afd VHDL 1 03-23-2007 09:33 AM
"LoadLibrary" of a 32 bit so with 64 bit java on a 64 bit machine markryde@gmail.com Java 3 01-19-2007 10:30 PM
64 bit - Windows Liberty 64bit, Windows Limited Edition 64 Bit, Microsoft SQL Server 2000 Developer Edition 64 Bit, IBM DB2 64 bit - new ! vvcd Computer Support 0 09-17-2004 08:15 PM
64 bit - Windows Liberty 64bit, Windows Limited Edition 64 Bit,Microsoft SQL Server 2000 Developer Edition 64 Bit, IBM DB2 64 bit - new! Ionizer Computer Support 1 01-01-2004 07:27 PM



Advertisments