Lately I have been doing some fractional binary calculations with signed binary numbers in the 2's complement format. I have a reasonable understanding of how to add, sub, multiply with these numbers etc. However I continue to get caught out by a 2's complement misunderstanding or by possible rounding confusion.
I am writing VHDL model to match a C algorithm, so I have benchmark of what results I should be getting from this C code. My VHDL model matches the expected C results except for when I get a negative result, which is always 1 off from where I expect it to be.
I am trying to implement the following equation:
X=(AB)*C;
where A & B are integers represented in binary,
and C is a fractional binary number
Examples:
( 4  ( 121 ) )*20.0928 = 2511.6
> In modelSim I get a result of 2511 (Decimal), which is what I expected
( 1  68 )*5.9936 = 413.558
> In VHDL I get 414, when I expected 413.
In VHDL I perform this calculation then shift right and resize the result inorder to get it into the correct width and with the correct binary point location.
Is this normal for the negative numbers to round down? I assumed the fractional part would just be disregarded. Has anyone else experienced this issue?
Thanks
