Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > C program that exercises the simulated design

Reply
Thread Tools

C program that exercises the simulated design

 
 
Thoma
Guest
Posts: n/a
 
      12-18-2009
Hi all,

I asked whether it was possible to mount a test environment where:
- ModelSim simulates the model and
- a C program will exercise the model through two simulators (UART and
proprietary BUS)

+------------+
+-----------+ | | +-----------+
| UART |------>| | | BUS |
TCP/IP <-->| | | D.U.T. |<---->| |<-->
TCP/IP
| SIMULATOR |<------| | | SIMULATOR |
+-----------+ | | +-----------+
+------------+

I heard about FLI. Is it the solution?
If yes, have someone an example that demonstrate this possibility?

Thank you in advance.

Thoma
 
Reply With Quote
 
 
 
 
Amal
Guest
Posts: n/a
 
      12-18-2009
On Dec 18, 4:50*pm, Thoma <(E-Mail Removed)> wrote:
> Hi all,
>
> I asked whether it was possible to mount a test environment where:
> - ModelSim simulates the model and
> - a C program will exercise the model through two simulators (UART and
> proprietary BUS)
>
> * * * * * * * * * * * * * * * *+------------+
> * * * * * *+-----------+ * * * | * * * * * *| * * *+-----------+
> * * * * * *| * UART * *|------>| * * * * * *| * * *| * *BUS * *|
> TCP/IP <-->| * * * * * | * * * | * D.U.T. * |<---->| * * * * * |<-->
> TCP/IP
> * * * * * *| SIMULATOR |<------| * * * * * *| * * *| SIMULATOR |
> * * * * * *+-----------+ * * * | * * * * * *| * * *+-----------+
> * * * * * * * * * * * * * * * *+------------+
>
> I heard about FLI. Is it the solution?
> If yes, have someone an example that demonstrate this possibility?
>
> Thank you in advance.
>
> Thoma


Take a look at this page for an example of how to use FLI to connect
to a terminal emulator.

http://www.ht-lab.com/howto/uart2fli/uart2fli.html

If you use SystemVerilog though, this can be done much easier by using
DPI.

Cheers,
-- Amal
 
Reply With Quote
 
 
 
 
Thoma
Guest
Posts: n/a
 
      12-19-2009
On 19 déc, 00:51, Amal <(E-Mail Removed)> wrote:
>
> Take a look at this page for an example of how to use FLI to connect
> to a terminal emulator.
>
> *http://www.ht-lab.com/howto/uart2fli/uart2fli.html
>
> If you use SystemVerilog though, this can be done much easier by using
> DPI.
>
> Cheers,
> -- Amal


Hi Amal,

Seems to be what I want do. Can this kind of operation done with the
ModelSim XE (xilink edition)?
Or is it required to use the other possibility?
http://www.ht-lab.com/howto/remotemt..._modelsim.html

Thank you in advance

Thoma
 
Reply With Quote
 
Mike Treseler
Guest
Posts: n/a
 
      12-19-2009
Thoma wrote:

> I asked whether it was possible to mount a test environment where:
> - ModelSim simulates the model and
> - a C program will exercise the model through two simulators (UART and
> proprietary BUS)
>
> +------------+
> +-----------+ | | +-----------+
> | UART |------>| | | BUS |
> TCP/IP <-->| | | D.U.T. |<---->| |<-->
> TCP/IP
> | SIMULATOR |<------| | | SIMULATOR |
> +-----------+ | | +-----------+
> +------------+
>


I would use a vhdl testbench to transfer the IP packets
straight to and from the dut, and run bus cycles.
Once that is working, I would add the real serial and bus interfaces
and try it on the bench.

-- Mike Treseler
 
Reply With Quote
 
Kenn Heinrich
Guest
Posts: n/a
 
      12-20-2009
Mike Treseler <(E-Mail Removed)> writes:

> I would use a vhdl testbench to transfer the IP packets
> straight to and from the dut, and run bus cycles.
> Once that is working, I would add the real serial and bus interfaces
> and try it on the bench.
>
> -- Mike Treseler


Another idea along the same lines: if you want to integrate an existing
bit-accurate golden reference model written in 'C' to your VHDL, you
could always get the C program to dump out a file with the reference
data, and use the VHDL testbench to pull the data from the file,
excercise the design, and compare the results.

Since you need to write an extra couple of C functions to do this, you
can even make the C code write the data out as though they were, for
example, VHDL initialized array constants inside a VHDL package, so you
can directly compile the output "vector file" with your VHDL compiler,
and include the package in with your testbench, avoiding the VHDL file
I/O step.

It's kind of klunky, admittedly, and not as neat as a proper FLI
integration, but for some applications it's much less work that going up
the learning curve and/or locking yourself into one tool's
specifics. But at least the process is fully automatic (you could script
it) and bit-accurate to your C test cases.

- Kenn

 
Reply With Quote
 
Jonathan Bromley
Guest
Posts: n/a
 
      12-27-2009
On Fri, 18 Dec 2009 13:50:12 -0800 (PST), Thoma wrote:

>I asked whether it was possible to mount a test environment where:
>- ModelSim simulates the model and
>- a C program will exercise the model through two simulators (UART and
>proprietary BUS)
>
> +------------+
> +-----------+ | | +-----------+
> | UART |------>| | | BUS |
>TCP/IP <-->| | | D.U.T. |<---->| |<-->
>TCP/IP
> | SIMULATOR |<------| | | SIMULATOR |
> +-----------+ | | +-----------+
> +------------+
>
>I heard about FLI. Is it the solution?


You got some useful answers to that.

Another possibility is to use Tcl to control the high-level
stimulus. ModelSim supports Tcl very well, and Tcl provides
truly excellent features for operating system interface, file
access, remote control via TCP/IP sockets and so on.

Tcl, of course, is quite slow. Even slower when you must use
the simulator's [force] and [examine] commands to gain access
to HDL signals. But if you can keep the Tcl side of things
operating at a fairly abstract level, so that Tcl only manages
complete cycles on the bus and complete bytes (or even packets)
on the TCP/IP side, the overhead should be small in relation to
the cost of simulating the DUT.

You could even use Tcl's sockets interface so that the TCP/IP
stimulus was in fact coming from real TCP/IP traffic from
another piece of software.

Tcl is a strange language, but it has considerable merits
for this sort of high-level control and interaction; don't
ignore its possibilities.
--
Jonathan Bromley


 
Reply With Quote
 
Thoma
Guest
Posts: n/a
 
      01-02-2010
On 27 déc 2009, 13:32, Jonathan Bromley
<(E-Mail Removed)> wrote:
>
> You got some useful answers to that.
>
> Another possibility is to use Tcl to control the high-level
> stimulus. *ModelSim supports Tcl very well, and Tcl provides
> truly excellent features for operating system interface, file
> access, remote control via TCP/IP sockets and so on.
>
> Tcl, of course, is quite slow. *Even slower when you must use
> the simulator's [force] and [examine] commands to gain access
> to HDL signals. *But if you can keep the Tcl side of things
> operating at a fairly abstract level, so that Tcl only manages
> complete cycles on the bus and complete bytes (or even packets)
> on the TCP/IP side, the overhead should be small in relation to
> the cost of simulating the DUT.
>
> You could even use Tcl's sockets interface so that the TCP/IP
> stimulus was in fact coming from real TCP/IP traffic from
> another piece of software.
>
> Tcl is a strange language, but it has considerable merits
> for this sort of high-level control and interaction; don't
> ignore its possibilities.
> --
> Jonathan Bromley


Hi all,

Just before continuing with this topic, I wish you all a happy new
year.

Jonathan, your idea is I think the easiest for me.
I will write a collection of VHDL procedures that exercise the DUT.
I never write TCL code before but I took a look on various tutorials
and it seems feasible.

I have not found a tutorial that explains how to fire the different
VHDL procedures from TCL.

Can someone share a example?

Do you think that I am on the good way?

Thank you in advance

Thoma
 
Reply With Quote
 
Jonathan Bromley
Guest
Posts: n/a
 
      01-02-2010
On Sat, 2 Jan 2010 14:10:04 -0800 (PST), Thoma wrote:

>I have not found a tutorial that explains how to fire the different
>VHDL procedures from TCL.


Usually the easiest way is to create a signal of integer or
enumeration type, with one value for each of your procedures
(and probably one additional value to represent "do nothing").
You can then write a VHDL driver block that uses this signal
to fire the procedures:

type tcl_TEST_ACTION is (tcl_DO_NOTHING, tcl_ACTION_A, ...);
signal tcl_COMMAND : tcl_TEST_ACTION;
signal tcl_BUSY : boolean;
...
process
begin
-- Wait for a command to come from Tcl
wait until tcl_COMMAND /= tcl_DO_NOTHING;
-- Respond to the command
tcl_BUSY <= TRUE;
-- Do the command
case tcl_COMMAND is
when tcl_DO_NOTHING => null;
when tcl_ACTION_A => do_ACTION_A_procedure;
....
end case;
-- Indicate not busy
tcl_BUSY <= FALSE;
-- and go back to waiting
end process;

Now, from your simulator's command line (or a Tcl script running
in the simulator's console) you can use a combination of "force"
commands to drive the tcl_COMMAND signal, "examine" commands to
look at the tcl_BUSY and other signals, and signal breakpoints
to detect the TRUE/FALSE transitions on tcl_BUSY. Something
like this should work in ModelSim (details will vary for
other simulators, but the principles should be the same):

# Tcl procedure to respond to changes on tcl_BUSY
proc respond_busy {} {
set busy [examine tcl_busy]
if {$busy} {
# VHDL accepted your command. Remove the command.
force -deposit tcl_command tcl_do_nothing
}
}

# Trigger some activity whenever tcl_BUSY changes
set when_handler [when tcl_busy {respond_busy}]
# Run the simulation for a while
run 100 ns
# Run a command
force -deposit tcl_command tcl_action_a
# Run the simulation some more
run 1000 ns
......
# Cancel the "when" handler
nowhen $when_handler

Note that ModelSim maps all VHDL names to lowercase.

Hope this helps
--
Jonathan Bromley
 
Reply With Quote
 
 
 
Reply

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
problem in running a basic code in python 3.3.0 that includes HTML file Satabdi Mukherjee Python 1 04-04-2013 07:48 PM
SPA-3000 - Connecting to simulated PSTN line Brian A UK VOIP 7 01-13-2006 11:28 AM
Simulated Tests? jack tinker MCSE 4 04-01-2005 05:19 PM
Minolta Dimage XG - Simulated Camera Sounds W4NNG Digital Photography 6 04-04-2004 08:59 PM
Problem: global variable with a 2d dynamic array simulated using a collection class within a singleton object stan k. Java 1 09-23-2003 03:48 PM



Advertisments