gabor wrote:
> On Nov 10, 10:18 am, Jan Decaluwe <j...@jandecaluwe.com> wrote:
>> Hello:
>>
>> Today I am announcing a series of blog posts about my
>> views on HDL Design, hosted on the Sigasi website.
> O.K., since you posted this to comp.lang.verilog I have to
> ask if Sigasi HDT will be supporting Verilog?
There are plans (of course), but not yet a schedule.
Hopefully, this blog will make the site more useful for
everyone interested in the concepts behind HDL design.
For the most part, these are language neutral. For Sigasi,
this is the public they like to interact with to steer
future developments.
Regards,
Jan
--
Jan Decaluwe - Resources bvba -
http://www.jandecaluwe.com
Python as a HDL:
http://www.myhdl.org
VHDL development, the modern way:
http://www.sigasi.com
Analog design automation:
http://www.mephisto-da.com
World-class digital design:
http://www.easics.com