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VHDL - how to convert real to std_logic

 
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Old 10-26-2009, 10:56 AM   #1
Default how to convert real to std_logic


hello
i'm new in vhdl
i want to convert real to std_logic
(in fact i want to put the real value to the output so first i should convert
it to std_logic right?)
how can i do it?
thanks.


sajjadesrari
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Old 10-26-2009, 06:21 PM   #2
jeppe
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Try this:

vector_with_8bit <= conv_std_logic_vector( integer( r), 8 );


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Old 10-31-2009, 04:10 PM   #3
sajjadesrari
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thanks but i couldnt check it because
i have problem in converting std_logic to real!!!!
i did this:
real variable := to_real(to_integer(signed(std_logic value)));

but with this error:
Error (10305): VHDL Type Conversion error at xorgate.vhd(54): cannot convert type "std_logic" to type "SIGNED"

what's this????
thanks...


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