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[cherishnguyen]

Hi all,

I study about ADPLL now, I found that DCO uses Accumulator can generate exactly the f(DCO) by using the adder N-bits to add the K number at every rising clock of high frequecy fs. Following formula is used to caculate:
f(DCO) = fs x K / 2^N
Can anyone pls explain me:
1) how they generate this formula?
2) the number K added into adder at every rising clock in order to decrease the frequency. How does accumulator make it possible to generate fDCO lower than fs?

Thanks in advance.

[eliascm]

If you Google direct frequency synthesis you will find a large body of information that will surely answer your question.