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[ctennant]

Hi,

I am new to VHDL and am having difficulty with this part of my project.

I am trying to take a 9 bit vector and check to see if it has 5 or more 0s. If it does I am assigning a second signal a 0, but if it doesn't I am assigning that signal to a 1.

Is there a way to read a vector to determine the amount of 0s or 1s in it? Thanks for any and all help.

-Connor

[ctennant]

This is what I have done, sorry for not posting this earlier, I think it should work. I found an example in my book and have expanded on it.

I am trying to read data coming in from a 9 bit vector. If there 5 or more zeros I need to assign a value of zero to a second signal, and 1 if otherwise. I am then running that through a shift register. I'm not sure that I am exiting my loop though. Thanks for reading.

entity smoother is
Port(smoother_clk, smoother_rst: In std_logic;
smoother_data_in: In std_logic_vector(8 downto 0);
smoother_data_out: Out std_logic_vector(75 downto 0));
end smoother;

architecture Behavioral of smoother is

SIGNAL zeros: integer;
SIGNAL smoothed: std_logic;
SIGNAL smoother_shift: std_logic_vector(75 downto 0);

begin

Process(smoother_data_in, zeros, smoothed, smoother_shift, smoother_clk, smoother_rst)

variable count: Integer Range 0 to 8;

Begin
If (smoother_rst ='0') then
smoother_data_out <= x"0000000000000000000";

elsif (smoother_clk'EVENT and smoother_clk='1') THEN
count := 0;
FOR i IN smoother_data_in'Range LOOP
CASE smoother_data_in(i) IS
WHEN '0' => count := count + 1;
WHEN Others => count := count;
End Case;
End Loop;

zeros <= count;
If zeros >= 5 then
smoothed <= '0';
else
smoothed <= '1';
end if;
smoother_shift <= smoother_shift(74 downto 0) & smoothed;
end if;
smoother_data_out <= smoother_shift;

End Process;
end Behavioral;