I need to compute an evarage of an analog input
sampled by a ADC
The evarage is defined for several peaks sum devided in the number of peaks
so it changes all the time.
I need this for an audio effect design.
The main problem is how to exactly "catch" the
peak sample that is closest to the real peak
in the input volatage sampled .
How do I do that with VHDL ?
I do not ask for the code just the alorythm
in simple words.
"BarNash" <(E-Mail Removed)> כתב
> I need to compute an evarage of an analog input
> sampled by a ADC
> The evarage is defined for several peaks sum devided in the number of
> peaks so it changes all the time.
> I need this for an audio effect design.
> The main problem is how to exactly "catch" the
> peak sample that is closest to the real peak
> in the input volatage sampled .
> How do I do that with VHDL ?
> I do not ask for the code just the alorythm
> in simple words.
I guess that's part of the assignment. By letting us guys doing your work
you will not learn much. Just start playing with this problem and come up
with some ideas, and then mentally (and/or on paper) test those ideas.
As an initial thought I would define some window over which you detect the
maximum value thus far. After the window has expired, you copy the value to
the output, reset the maximum value and start a new window.
Oops, I have already said too much.
But also: if the requirements are not clear, you should ask for
clarification from whoever gave you the assignment. Without proper
requirements you cannot verify whether you have implemented them correctly.
Remember: requirements are like water. They'd better be frozen before you
start building on them.
You are welcome.
By the way: see also Jonathan Bromley's reply two days ago. That was also
meant as a starter.