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Testbench design references

 
 
Benjamin Couillard
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      06-17-2009
Hi everyone,

I'm an FPGA Designer and I'm currently trying to implement self-
checking testbenches. Basically, I want testbenches that would output
a message saying that the module has completed the test with x number
of errors. So far, I have some testbenches that are self-checking but
I'm not really satisfied on the quality of my code. Do you guys have
any references or book to recommend? I don't want simple testbench
examples that test a 4-bit counter, I'd like more "real-world"
examples.

I hope I'm clear enough.

Best regards.
 
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Mike Treseler
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      06-17-2009
Benjamin Couillard wrote:

> I'm an FPGA Designer and I'm currently trying to implement self-
> checking testbenches.


http://mysite.verizon.net/miketreseler/test_uart.vhd
 
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Benjamin Couillard
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      06-17-2009
On Jun 17, 4:04*pm, Mike Treseler <mtrese...@gmail.com> wrote:
> Benjamin Couillard wrote:
> > I'm an FPGA Designer and I'm currently trying to implement self-
> > checking testbenches.

>
> http://mysite.verizon.net/miketreseler/test_uart.vhd


Thanks, that's what I needed!

Best regards
 
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