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06-17-2009, 08:48 PM
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#1 |
Testbench design references
Hi everyone,
I'm an FPGA Designer and I'm currently trying to implement self- checking testbenches. Basically, I want testbenches that would output a message saying that the module has completed the test with x number of errors. So far, I have some testbenches that are self-checking but I'm not really satisfied on the quality of my code. Do you guys have any references or book to recommend? I don't want simple testbench examples that test a 4-bit counter, I'd like more "real-world" examples. I hope I'm clear enough. Best regards. Benjamin Couillard |
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06-17-2009, 09:04 PM
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#2 |
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Posts: n/a
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Re: Testbench design references
Benjamin Couillard wrote:
> I'm an FPGA Designer and I'm currently trying to implement self- > checking testbenches. http://mysite.verizon.net/miketreseler/test_uart.vhd Mike Treseler |
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06-17-2009, 10:35 PM
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#3 |
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Posts: n/a
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Re: Testbench design references
On Jun 17, 4:04*pm, Mike Treseler <mtrese...@gmail.com> wrote:
> Benjamin Couillard wrote: > > I'm an FPGA Designer and I'm currently trying to implement self- > > checking testbenches. > > http://mysite.verizon.net/miketreseler/test_uart.vhd Thanks, that's what I needed! Best regards Benjamin Couillard |
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