VHDL - UCF file for virtex 5

05-23-2009, 07:35 PM

Hello,

I have synthesized my design and now i want to write ucf file but i don't know how to assign proper pin number to make UCF file.

Thanx in advance

dhoomketu

JohnDuq · 05-29-2009, 02:07 PM

If you are using Xilinx ISE the UCF file is defined in the Processes window

- User Constraints
-- Assign Package Pins

This opens up Xilinx PACE where it lets you define the pinout. After you run this the first time minor pinout changes can be made directly in the .UCF file.

JohnDuq

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05-23-2009, 07:35 PM	#1
	UCF file for virtex 5 Hello, I have synthesized my design and now i want to write ucf file but i don't know how to assign proper pin number to make UCF file. Thanx in advance dhoomketu

05-29-2009, 02:07 PM	#2
JohnDuq Member Join Date: Dec 2008 Posts: 83	If you are using Xilinx ISE the UCF file is defined in the Processes window - User Constraints -- Assign Package Pins This opens up Xilinx PACE where it lets you define the pinout. After you run this the first time minor pinout changes can be made directly in the .UCF file. JohnDuq