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VHDL - I need a function to truncate a SIGNED vector efficiently |
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Hi Folks
I am trying to find a function that can truncate a VHDL SIGNED vector efficiently. In other words, trim the extra sign-bit duplicates (if existing) then truncate the SINGED vector to a given new length. For example : If the input vector that needs to be efficiently truncated is: "11111011" After trimming it should look like this: "1011" And if we want to truncate it to only 2 bits, the final result should look like this: "10" This allows for better truncation precision. omara007 |
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