modulo function

Hi
I am quite fresh with vhdl and i have a problem. How to realize modulo
function using signals not variables?
For example: modulo_signal <= sample_signal mod 65536;

Best regards,
qharz

qharz

On May 18, 11:39*pm, "qharz" <tkucha...@gmail.com> wrote:
> Hi
> I am quite fresh with vhdl and i have a problem. How to realize modulo
> function using signals not variables?
> For example: modulo_signal <= sample_signal mod 65536;
>
> Best regards,
> qharz

If you need to calculate mod 2^n it is as simple as just using the
array slice containing the data you seek.
You know x mod m gives you the rest of the division of x/m. If m is
2^n, you simply need to take the lower n bits of the array to get your
result.

x / m for m = 2^n is x >> m, the rest is then the part shifted away,
or x - (( x >> m ) << m), or if x is an std_logic_vector( ? downto 0),
result <= x( n - 1 downto 0);

Hope that helps,
Andreas Wallner

AndreasWallner

> x / m for m = 2^n is x >> m, the rest is then the part shifted away,
> or x - (( x >> m ) << m), or if x is an std_logic_vector( ? downto 0),
> result <= x( n - 1 downto 0);
>
It helps,
Thank You very much

qharz

qharz

On May 18, 4:39*pm, "qharz" <tkucha...@gmail.com> wrote:
> Hi
> I am quite fresh with vhdl and i have a problem. How to realize modulo
> function using signals not variables?
> For example: modulo_signal <= sample_signal mod 65536;
>
> Best regards,
> qharz

As long as the signal data types are either integer,
numeric_std.signed or .unsigned, your example will work just fine.
Numeric_std defines the modulo operator with .unsigned, .signed or
integer RH operands. It is also directly synthesizable so long as the
RH operand is a static (i.e. value is known at synthesis time),
integral power of two, which simplifies to simply a slice operation.
For the purposes of synthesis, "static" also includes such things as
for-loop indices, since loops are unrolled anyway.

Andy

Andy