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Pseudorandom Noise Generator....

 
 
comp.lang.vhdl
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      03-16-2009
I m generating a PN Sequence in which for sake of simplicity i m
taking three flip flops for 3 bit sequence...and the design is such
that.....q(1) gets input from q(0)....q(2) gets input from q(1)....and
q(0) gets input from the xor output of q(1) and q(2)....now the
problem is that...i want to store the output of q(2) upto 7
cycles...so that i can get a 7-bit sequence....which is a PN
Sequence....please help me...i need a VHDL code for this.....
 
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Stef
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      03-16-2009
In comp.lang.vhdl,
comp.lang.vhdl <(E-Mail Removed)> wrote:
> I m generating a PN Sequence in which for sake of simplicity i m
> taking three flip flops for 3 bit sequence...and the design is such
> that.....q(1) gets input from q(0)....q(2) gets input from q(1)....and
> q(0) gets input from the xor output of q(1) and q(2)....now the
> problem is that...i want to store the output of q(2) upto 7
> cycles...so that i can get a 7-bit sequence....which is a PN
> Sequence....please help me...i need a VHDL code for this.....


So you need VHDL code for a 7-bit shift register? Shouldn't be hard to
find with a search engine. And there seems to be something wrong with
your keyboard: It generates some extra punctuation at (pseudo?) random
intervals.

--
Stef (remove caps, dashes and .invalid from e-mail address to reply by mail)

The Moral Majority is neither.
 
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JohnDuq JohnDuq is offline
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Join Date: Dec 2008
Posts: 88
 
      03-18-2009
Did you see this thread?

www dot velocityreviews dot com/forums/t21646-awgn-in-vhdl.html
 
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