ERROR: Selector is an unconstrained array

ERROR MESSAGE :
"Selector (Signal 'addr' of type std_logic_vector) is an unconstrained
array."

Architecture body, declarative part (before begin) can use entity
generics but statement part can't ?

I'm I right? Little explanation on this please.



entity rom1 is
generic (
ADDR_WIDTH : integer :=4;
DATA_WIDTH : integer :=8
);
port (
addr : in std_logic_vector (ADDR_WIDTH-1 downto 0);
dout : out std_logic_vector (DATA_WIDTH-1 downto 0)
);
end rom1;

architecture beh of rom1 is
begin
with addr select
dout <= "11001101" when "0000",
"01011100" when "0001",
"01010101" when "0010",
"00000000" when "0011",
...............
...............

Mad I.D.

Mad I.D. wrote:
> ERROR MESSAGE :
> "Selector (Signal 'addr' of type std_logic_vector) is an unconstrained
> array."
>
> Architecture body, declarative part (before begin) can use entity
> generics but statement part can't ?


I would code a constant array as Jonathan did.
http://mysite.verizon.net/miketreseler/sync_rom.vhd
Generic dimensions are ok for arrays, but not for case selections.
The only way to make an asynchronous one-liner,
is to use fixed widths as shown below.

-- Mike Treseler
__________________
library ieee;
use ieee.std_logic_1164.all;
entity rom1 is
port (
dout : out std_logic_vector(7 downto 0);
addr : in std_logic_vector(3 downto 0));
end entity case_vs_if;

architecture sim of rom1 is
begin
with addr select
dout <=
"11001101" when "0000",
"01011100" when "0001",
"01010101" when "0010",
"00000000" when "0011",
"00000000" when others;
end architecture sim;

Mike Treseler

Thanks all !

Mad I.D.