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Memory Controller for Cellular RAM + 128 word burst

 
 
Motta Motta is offline
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Join Date: Feb 2009
Posts: 2
 
      02-26-2009
Hello everyone!

I'm currently working on a stuedent proyect for my thesis in electronic engeneering at the University of Buenos Aires (UBA).

At the moment I am trying to design a memory controller for the Mircon MT45W8MW16BGX, part of the nexys2, kit sold at digilent.

For my design I need it to write and read as fast as possible, so therefore I decided to use the 128-word burst lenght mode.

I'm having great trouble achieving this task, since I never did this before.
Basicly, what I'm asking is:

1) VHDL model of the Micron memory, since in the micron webpage I can only find a VERILOG model ( I don't know verilog)

2) Any controller designed for this memory, maybe by looking at an example I can get inspired and figure out why the hell my controller isn't working. I looked in opencores, but didn't find anything.

Since this kit (nexys2) is quite popular; and by what I gather many stuedents abroad use it, maybe someone could help me out, because they already did a memory controller.

Kind regards,

Martin
 

Last edited by Motta; 02-26-2009 at 02:08 PM..
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jeppe jeppe is offline
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Join Date: Mar 2008
Location: Denmark
Posts: 348
 
      02-26-2009
Hi Martin

I found this at opencore - could be useful:
http://www.opencores.org/cvsweb.shtm...00_a/hdl/vhdl/

The startup test of the NEXYS board might contain some hints

Jeppe
 

Last edited by jeppe; 03-01-2009 at 09:43 AM..
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Motta Motta is offline
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Posts: 2
 
      03-04-2009
Thanks Dude for your post, this will definitly get me started!
 
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