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VHDL - any way to avoid warnings about unused outputs in XST?

 
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Old 03-02-2009, 10:51 PM   #11
Default Re: any way to avoid warnings about unused outputs in XST?


On Mar 2, 3:11*pm, Ken Cecka <cec...@alumni.washington.edu> wrote:
> Mike Treseler wrote:
> > Andy Peters wrote:

>
> >> Are you saying to do a direct instantiation and simply leave out the
> >> unused (open) ports?

>
> > Yes.
> > I was assuming that the warning is due
> > to a mismatched component declaration.

>
> > * * * -- Mike Treseler

>
> Unfortunately not. *The Xilinx tools generate a warning any time there's an unused output, and it doesn't seem to matter whether I use a component or direct instantiation. *I finally gave up and turned on a message filter.
>
> Ken


I just confirmed what Ken says. The warning is the simple

WARNING:Xst:753 - "C:/Projects/foo/fpga/src/jack.vhdl" line 420:
Unconnected output port 'mdValid' of component 'meter'.

I'll continue to use the open keyword, which naturally causes XST to
throw the SAME EXACT COMPLAINT.

Yes, I created WebCase 674970 to address this stupidity. I even had to
create a simple project that showed this, and it's been entered as an
Enhancement Request, meaning it was routed to /dev/null/.

-a


Andy Peters
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