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#1 |
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Hi all
When the gate level model is "placed and routed" does it change ? Does place and route change the gate level vhdl model ? What is the output of place and route , which files are generated in the place and route stage ? Thanks in advance EC RealInfo |
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#2 |
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Posts: n/a
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On 23 Feb., 13:10, "RealInfo" <therighti...@yahoo.com> wrote:
> Hi all > > When the gate level model is "placed and routed" > *does it change ? > Does place and route change the gate level vhdl model ? > > What is the output of place and route , which files are generated in the > place and route stage ? > > Thanks in advance > EC Ask your professor which vendors P&R tool manual you have to read in order to answer these questions. regards Eilert goouse@twinmail.de |
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#3 |
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Posts: n/a
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OK bbut what is the common ?
<> ??? ??????:cb7e1b09-8fcd-42f7-a69c-... On 23 Feb., 13:10, "RealInfo" <therighti...@yahoo.com> wrote: > Hi all > > When the gate level model is "placed and routed" > does it change ? > Does place and route change the gate level vhdl model ? > > What is the output of place and route , which files are generated in the > place and route stage ? > > Thanks in advance > EC Ask your professor which vendors P&R tool manual you have to read in order to answer these questions. regards Eilert RealInfo |
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