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VHDL - help me

 
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Old 02-20-2009, 10:11 AM   #1
Default help me


Hi to all,
Actually i want to implement following expression in VHDL.
X(n+1)=4*X(n)*(1-X(n))
where the X value is real value ex:X=.197. From this equation i want
to get 128 bits value.So now i am not getting how to start the
implentation and which part i should consider first.So please can you
help me by giving your Valuable suggetions.thank you


aralimaradsir@gmail.com
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Old 02-20-2009, 01:33 PM   #2
Tricky
 
Posts: n/a
Default Re: help me
On 20 Feb, 10:11, aralimarad...@gmail.com wrote:
> Hi to all,
> * * * * * * Actually i want to implement following expression in VHDL.
> * * * * * * *X(n+1)=4*X(n)*(1-X(n))
> where the X value is real value ex:X=.197. From this equation i want
> to get 128 bits value.So now i am not getting how to start the
> implentation and which part i should consider first.So please can you
> help me by giving your Valuable suggetions.thank you


Are you talking about putting it in real hardware, or just write the
expression literally in VHDL.

for literal:

process
type real_array_t is array(natural range <>) of real;
variable X : real_array_t(0 to n-1);
begin

X(0) := start_value;

for i in 1 to X'high loop
X(i) := 4.0 * X(i-1) * (1-X(i-1));
end loop;

wait;
end process;


But I doubt you really mean that.

It all depends on whether you want to stick with floating point, or
can happily go to fixed point. I would highly recommend you look into
fixed point. (given that I assume X(n) is always < 1, fixed point is
straight forward).
With fixed point 4*X(n) becomes a 2 bit shift, which leaves you with
the simple steps of just multiplying X(n) and (1-X(n)) together.
You may be in trouble by needing 128 bits of representation. Altera
multipliers (and AFAIK Xilinx too) can only go up to 36x36, giving a
72 bit result. You have to do some intelligent chaining to get a 128
bit result.


Tricky
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Old 02-23-2009, 08:04 AM   #3
goouse@twinmail.de
 
Posts: n/a
Default Re: help me
On 20 Feb., 11:11, aralimarad...@gmail.com wrote:
> Hi to all,
> * * * * * * Actually i want to implement following expression in VHDL.
> * * * * * * *X(n+1)=4*X(n)*(1-X(n))
> where the X value is real value ex:X=.197. From this equation i want
> to get 128 bits value.So now i am not getting how to start the
> implentation and which part i should consider first.So please can you
> help me by giving your Valuable suggetions.thank you


Hi,
maybe you should start thinking about the binary representation of
numbers smaller than '1'.
The tricky part is that they seldom fit into a fixed number of bits
without truncenation or rounding.
If the result shall be 128 bit width, you can calculate backwards from
teh result to your input values, how many bits are allowed for these.

Also think about restructuring your formula:

X(n+1)=4*X(n)*(1-X(n))

can be rewritten as:

X(n+1)=4*(X(n)-X(n)˛)

Now you have to deal with squaring a value instead of generic
multiplication.
I'm not sure if squaring leads to a greater simplification for the
multiplier, but if your input values are always below one the result
will always even be smaller than the input values. Think about the
consequenses.

The multiply by four can be done by simple shifting (which means just
reconnecting with an ofset, no need for a shift register here) and is
probably just for scaling/normalizing purposes, so your result wont
fade away with the number of iterations you do.

Have a nice synthesis
Eilert


goouse@twinmail.de
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