Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > vhdl code problem

Reply
Thread Tools

vhdl code problem

 
 
ase ase is offline
Junior Member
Join Date: Dec 2008
Posts: 3
 
      12-13-2008
Please I need help.
I wanna know how we can verify if a year (which is my input) is a leap year (my output) using vhdl code.
 
Reply With Quote
 
 
 
Reply

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
Emacs VHDL-Mode Problem : vhdl-update-sensitivity-process omara007 VHDL 0 01-06-2010 03:47 AM
Verilog Code to VHDL Code pplnet VHDL 0 12-09-2009 04:18 PM
VHDL-2002 vs VHDL-93 vs VHDL-87? afd VHDL 1 03-23-2007 09:33 AM
multiD-vhdl: Multi Dimensional Arrays (allowing generics on each dimension) for VHDL (including ports) albert.neu@gmail.com VHDL 2 03-21-2006 04:05 PM
what's the difference between VHDL 93 CONCATENATION and VHDL 87 CONCATENATION? walala VHDL 3 09-18-2003 04:17 AM



Advertisments