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Clock Frequency & timming constraints

 
 
samehsh samehsh is offline
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Join Date: Jun 2008
Posts: 7
 
      11-22-2008
Tool: Xilinx ISE 9.1

I'm doing a multiplier for binary number and i get a clock frequecncy value in synthesis report does this meaning thing? specially i assign other clock frequency in timing constraints.
 
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jeppe jeppe is offline
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Join Date: Mar 2008
Location: Denmark
Posts: 348
 
      11-22-2008
I guess the value you got in the rapport would be the Max frequency - you can use lower frequencies in the real design

Jeppe
 
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