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VHDL - how to display on LCD of FPGA board? |
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#1 |
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Hello everyone
Good day. I am a very novice in VHDL programming. I want to display a bit-stream (for example: 1101) in the LCD of Xilinx® Virtex™-4 LX MB Development Kit. For the time being I take the inputs (EN, RS, INPUT DATA) using DIP switches and want to display the DATA on LCD. Here is my simple code entity test_lcd is port( lcd_rs, lcd_en: inout std_logic; lcd_in: in std_logic_vector(3 downto 0); lcd_out: out std_logic_vector(3 downto 0) ); end test_lcd; architecture test_lcd_arch of test_lcd is begin lcd_out <= lcd_in; end test_lcd_arch; ----------------------------------- My .ucf code is # Two DIP switch to take input RS and EN NET "lcd_rs" LOC = C10; NET "lcd_en" LOC = D10; # Four DIP switch for DATA input to be displayed on LCD NET "lcd_in<0>" LOC = D1; NET "lcd_in<1>" LOC = D2; NET "lcd_in<2>" LOC = A4; NET "lcd_in<3>" LOC = B4; # signal to RS and EN of LCD display NET "lcd_rs" LOC = N21; NET "lcd_en" LOC = L19; # signal to D0-D3 of LCD display NET "lcd_out<0>" LOC = K25; NET "lcd_out<1>" LOC = P19; NET "lcd_out<2>" LOC = AC10; NET "lcd_out<3>" LOC = AB10; ---------------------------------------- I have generated the programming file and downloaded it to the FPGA. But the LCD display shows nothing when i change the DIP switches. Plz help me to find the mistake. Please HELP. Pantho vx100miles Last edited by vx100miles : 11-21-2008 at 09:26 AM. |
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#2 |
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Junior Member
Join Date: Oct 2008
Posts: 9
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Hello everyone
Good day. I am a very novice in VHDL programming. I want to display a bit-stream (for example: 1101) in the LCD of Xilinx® Virtex™-4 LX MB Development Kit. For the time being I take the inputs (EN, RS, INPUT DATA) using DIP switches and want to display the DATA on LCD. Here is my simple code entity test_lcd is port( lcd_rs, lcd_en: inout std_logic; lcd_in: in std_logic_vector(3 downto 0); lcd_out: out std_logic_vector(3 downto 0) ); end test_lcd; architecture test_lcd_arch of test_lcd is begin lcd_out <= lcd_in; end test_lcd_arch; ----------------------------------- My .ucf code is # Two DIP switch to take input RS and EN NET "lcd_rs" LOC = C10; NET "lcd_en" LOC = D10; # Four DIP switch for DATA input to be displayed on LCD NET "lcd_in<0>" LOC = D1; NET "lcd_in<1>" LOC = D2; NET "lcd_in<2>" LOC = A4; NET "lcd_in<3>" LOC = B4; # signal to RS and EN of LCD display NET "lcd_rs" LOC = N21; NET "lcd_en" LOC = L19; # signal to D0-D3 of LCD display NET "lcd_out<0>" LOC = K25; NET "lcd_out<1>" LOC = P19; NET "lcd_out<2>" LOC = AC10; NET "lcd_out<3>" LOC = AB10; ---------------------------------------- I have generated the programming file and downloaded it to the FPGA. But the LCD display shows nothing when i change the DIP switches. Plz help me to find the mistake. Please HELP. Pantho vx100miles |
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