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VHDL - How portable is this code?

 
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Old 11-14-2008, 03:03 PM   #1
Default How portable is this code?


consider the following functions:

function get_i return integer is
begin
return 10;
end function get_i;

function get_i return boolean is
begin
return true;
end function get_i;

they both have the same name but different return types. are these
going to be safe in something like this statement across most, if not
all simulators?

echo(integer'image(get_i) & " " & boolean'image(get_i) & LF);

Am I creating a potentially confusing (for the simulator/synthesisor)
situation?


Tricky
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Old 11-14-2008, 04:08 PM   #2
Mike Treseler
 
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Default Re: How portable is this code?
Tricky wrote:

> Am I creating a potentially confusing (for the simulator/synthesisor)
> situation?


As long as the return types are different,
the function IDs can be the same.

-- Mike Treseler


Mike Treseler
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Old 11-17-2008, 10:57 AM   #3
Martin Thompson
 
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Default Re: How portable is this code?
Tricky <> writes:

> consider the following functions:
>
> function get_i return integer is
> begin
> return 10;
> end function get_i;
>
> function get_i return boolean is
> begin
> return true;
> end function get_i;
>


I make lots of use of this in my simulations. For example, I have
functions to decode data streams which can return several different types,
depending on how much the data I'm interested in having returned to
me.

I've never tried it in synthesis though - it ought to work,
but... well, let's say I'm a bit more pessimistic in my expectations
of synth tools (although not as much as some are

Cheers,
Martin

--

TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.net/electronics.html


Martin Thompson
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