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how to read jpg file using VHDL

 
 
Tricky
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      10-20-2008
On 19 Oct, 10:47, "rajashree.SMST" <rajashree....@gmail.com> wrote:
> On Oct 19, 12:39*pm, Tricky <Trickyh...@gmail.com> wrote:
>
>
>
> > On Oct 19, 3:54*am, raj <rajashree....@gmail.com> wrote:

>
> > > On Oct 19, 4:57*am, Mike Treseler <mtrese...@gmail.com> wrote:

>
> > > > raj wrote:
> > > > >>> i want VHDL code of reading an image....and view that image after
> > > > >>> processing.......with explaination.....

>
> > > > If you want synthesis code, you can

>
> > > > * 1. learn vhdl simulation and synthesis and write your own.
> > > > * 2. buy a core.
> > > > * 3. hire a consultant.

>
> > > > > actually i want to implement my algorithms on virtex 5...so.....for
> > > > > that..what to do.....what changes required in vhdl

>
> > > > Changes?

>
> > > > If you have vhdl sources already,
> > > > just edit and sim until it works.

>
> > > > * * * -- Mike Treseler

>
> > > 8 point FFT prog has already simulated.......but my problem is..how to
> > > implement it on vietex 5.....how to give inputs to get proper
> > > output......through hex editor.....in xilinx 9.....there is any option
> > > of hex editor.........?????????

>
> > A virtex 5, or any FPGA, is not a processor. It is whatever you want
> > it to be, but sending it data is not as simple as you are thinking.
> > You have to design the core you want to put in there, which includes
> > the processor and whatever communication method you want.

>
> > From what you are posting it sounds like you think the virtex 5 is
> > more than a blank canvas. There is no method of communication with the
> > Virtex 5 other than the one you put there yourself. When you say you
> > have done simulation already, is this software simulation, or VHDL
> > simulation? Do you have a VHDL version of your FFT core?

>
> i am using xilinx ISE 9 (VHDL) and modelslim........my program has
> synthesized...but my problem is.. i did not understand..how to
> implement it ..
>
> i think.....still i have some conceptual problem about virtex
> 5......ok...i will try.....thank you everybody......


If you have the design in VHDL, then all you should need now is some
method of communication. I assume the FFT will consume a large volume
of data, so you probably need ethernet. There are probably some cores
available on the internet. You will have to connect the output of the
ethernet core to the input of your FFT and output from the FFT to the
ethernet. You will have to write some code on the PC side to control
the flow of data. There is a nice core called Quixtream from Tekmicro
that does gigabit ethernet on to an FPGA, but it's only supported on
Virtex2 and 2pros according to their website. It comes with all the
drivers to drive the PC side of things.

Otherwise, you might want to try and get hold of some "Hardware in the
loop" kind of kit. I know mathworks like to talk about it. They have a
small Xilinx board that slots into a PCMCIA slot and Simulink will tie
everything all together. Ive only seen a demo, so I dont know how
applicable it would be in this case.
 
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