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VHDL ... What wrong with my real number???

 
 
elements_me elements_me is offline
Junior Member
Join Date: Dec 2007
Posts: 2
 
      09-13-2008
i have just wrote a simply codes in Quartus II to test how the Uniform function... but i met with the problem with the real number... the following is my codes...

process
variable s1 : integer;
variable s2 : integer;
variable x1,x2 : real;
begin
UNIFORM(s1,s2,x1);
UNIFORM(s1,s2,x2);
end process;

error : cannot synthesize non-constant real objects or values ...

anyone know what is the problem ??? thx
 

Last edited by elements_me; 09-13-2008 at 01:44 PM..
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Steff Steff is offline
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Join Date: Sep 2008
Posts: 11
 
      09-15-2008
Hy,

doesn't matter which kind of synthesis tool you take.
All these tools are not able to synthesis non-static numbers of type real.

If you want to synthesis random patterns like the procedure UNIFORM then have a look at this:

http://en.wikipedia.org/wiki/LFSR

Also have a look at the Megawizard inside Quartus II.

Steff
 

Last edited by Steff; 09-17-2008 at 12:15 PM..
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