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On 06 Sep 2008 17:04:58 -0700, thutt <> wrote:

>Hi,
>
>I've got a design that is in working order, albeit with a little more
>diagnostic signals still in the source than I really want. I am using
>the Xilinx Spartan 3E board, and I tend to use the on-board LEDs for
>diagnostic purposes.
>
>To that end, I have an entity which controls the PS/2 keyboard
>connected to my home brew computer with the following declaration:
>
> entity harp_keyboard_controller is
> generic (clock_rate : natural); -- clock speed in Hz
> port(clk : in std_logic;
> --->>> kbd_leds : out std_logic_vector(7 downto 0);
> kbd_clk : inout std_logic; -- keyboard clock signal
> kbd_data : inout std_logic; -- keyboard data signal
> interrupt : out boolean;
> reset : in std_logic;
> enable : in boolean;
> write : in boolean;
> address : in std_logic_vector(1 downto 0);
> data_size : in ram_types.memory_size_t;
> data_write : in std_logic_vector(7 downto 0);
> data_read : out std_logic_vector(7 downto 0);
> ready : out boolean);
> end entity harp_keyboard_controller;
>
>The 'kbd_leds' output signal was used for diagnostics, but is no
>longer needed.
[snip...snip...]
>It's only when I remove the signal declaration from
>'harp_keyboard_controller' that the project fails to function
>properly.
>
>I'm a software guy trying to do things with hardware,

#include <std_disclaimer>

Me too, so maybe some of my own recent faux pas may be relevant.

> and while I've
>learned a lot in the past 18 months, I am confounded by what appears
>to be lack of quality in the Xilinx toolchain. It doesn't seem to me
>that removing a completely unused signal should have an affect on the
>resulting synthesized hardware.

This is somewhat of a swag but I note that kbd_leds isn't a signal, it's
one of the black box's I/O ports and hooked up to the device pins (I
guess "to its balls" is more correct, still ...). Are they still
floorplanned in your user constraints file after removing them from the
port definition?

--
Rich Webb Norfolk, VA