Velocity Reviews > VHDL > Signed multiplication

# Signed multiplication

rickman
Guest
Posts: n/a

 09-09-2008
On Sep 9, 3:33*am, Muzaffer Kal <(E-Mail Removed)> wrote:
> On Mon, 8 Sep 2008 10:33:14 -0700 (PDT), rickman <(E-Mail Removed)>
> wrote:
>
> >On Sep 8, 12:58*pm, Muzaffer Kal <(E-Mail Removed)> wrote:
> >> You need to sign extend to the size of the result for two's complement
> >> multiplication work as expected for signed numbers. After the
> >> multiplication you need to use the lower 2N bits for the result. So
> >> 011x101 (3x-3) should be treated as 000011x111101 which gives the
> >> result 110111 6 bit result which is the expected outcome ie -9 in 6
> >> bits.

>
> >If you are using signed numbers, you only need 2n-1 bits to hold the
> >result.

>
> >Rick

>
> Have you considered the most negative number multiplied by itself?
> Unless you saturate to most positive number that result doesn't fit to
> 2n-1 bits.

I think you are confused. Try the math. It fits...

-8 x -8 = -64 === 1000 x 1000 = 1000000

or even simpler

-2 x -2 = -4 === 10 x 10 = 100

The reason this fits is because in an n bit signed number there are
n-1 significant bit plus a sign bit. Multiplied, this gives 2(n-1)
significant bits plus a sign bit or 2n-1 rather than 2n bit to hold
the full word.

Rick

rickman
Guest
Posts: n/a

 09-09-2008
On Sep 9, 4:21*am, Tricky <(E-Mail Removed)> wrote:
> > For me only 16 bits are required for signed representation..
> > But why these multipliers start of multiples of 9..?

>
> > Thanks for the reply

>
> Im not 100% sure exactly why they chose 9/18/36, but I think it has
> something to do with the fact that many of them allow you to
> accumulate before multiplying (8bits + 8bits = 9 bit result).
>
> Dont worry about having exact multiples of 9. If you dont append 0s
> (for unsigned multiplication) or the sign bit (for signed
> multiplication) the synthesiser will.

The fact that Xilinx matches multipliers to block RAMs (which come in
multiples of 9 bits) would make you think it has more to do with some
chip level efficiency improvements. It may just be that they are
sharing the I/O routing, or it may be that they are sharing some of
the logic. Can you use both the block rams and the multipliers?
Maybe it just ends up being a packing convenience based on the
symmetry of the routing for both.

Rick

Muzaffer Kal
Guest
Posts: n/a

 09-09-2008
On Tue, 9 Sep 2008 07:47:08 -0700 (PDT), rickman <(E-Mail Removed)>
wrote:

>On Sep 9, 3:33*am, Muzaffer Kal <(E-Mail Removed)> wrote:
>> On Mon, 8 Sep 2008 10:33:14 -0700 (PDT), rickman <(E-Mail Removed)>
>> wrote:
>>
>> >On Sep 8, 12:58*pm, Muzaffer Kal <(E-Mail Removed)> wrote:
>> >> You need to sign extend to the size of the result for two's complement
>> >> multiplication work as expected for signed numbers. After the
>> >> multiplication you need to use the lower 2N bits for the result. So
>> >> 011x101 (3x-3) should be treated as 000011x111101 which gives the
>> >> result 110111 6 bit result which is the expected outcome ie -9 in 6
>> >> bits.

>>
>> >If you are using signed numbers, you only need 2n-1 bits to hold the
>> >result.

>>
>> >Rick

>>
>> Have you considered the most negative number multiplied by itself?
>> Unless you saturate to most positive number that result doesn't fit to
>> 2n-1 bits.

>
>I think you are confused. Try the math. It fits...
>
>-8 x -8 = -64 === 1000 x 1000 = 1000000
>
>or even simpler
>
>-2 x -2 = -4 === 10 x 10 = 100

I know you're confused. When you square -8 you get +64 and when you
multiply -2 by itself you get +4. Continuing with the simpler case if
you have two bit two's complement numbers and you multiply the most
negative number (ie -2) by itself the result has to be a positive
number and one should be able to represent and interpret it thus. So
-2 x -2 == 10 x 10 = +4 == 0100. If you drop the leading zero and
claim that the result fits into 3 bits as opposed to 4 needed then you
should interpret it as a 3 bit two's complement number which makes 100
a negative number ie -4 which is the wrong result.

The confusing issue is that two's complement numbers don't have a
symmetrical distribution in the number line. The most negative two's
complement number of any size doesn't have an equivalent in the
positive domain so one can not describe it in the same size. And when
one squares the most negative number the result doesn't fit into 2n-1
but fits into 2n nicely.

KJ
Guest
Posts: n/a

 09-09-2008
On Sep 9, 10:47*am, rickman <(E-Mail Removed)> wrote:
>
> I think you are confused. *Try the math. *It fits...
>
> -8 x -8 = -64 *=== *1000 x 1000 = 1000000
>
> or even simpler
>
> -2 x -2 = -4 === 10 x 10 = 100
>

I guess I'll have to get a new calculator. It tells me...
-8 x -8 = 64 (not -64)
-2 x -2 = 4 (not -4)

But if my calculator is correct, then the signed representations would
need 7 bits to represent +64 and 3 bits to represent +4 in a signed
notation.

KJ

KJ
Guest
Posts: n/a

 09-09-2008
On Sep 9, 11:09*am, KJ <(E-Mail Removed)> wrote:

> then the signed representations would
> need 7 bits to represent +64 and 3 bits to represent +4 in a signed
> notation.
>

Make that 8 bits to represent +64 and 4 bits to represent +4 in signed
notation...sigh...

+64 = 01000000
+4 = 0100

KJ