«

[VenturaPOR]

Hi guys, this is my first post
I´ve a problem, i´ve got this process
"process(aux,flag_acabou,reset,soc)
begin
count<=aux;
if (flag_acabou='1')then
saida<=aux;
aux2<=aux;
else
saida<=aux2;--delete latch of saida, saida is an out signal
end if;
if(reset='1')then
saida<="0000";
end if;
if(soc='0')then
saida<="0000";
count<="0000";
end if;
end process;"

and when i sinthesize my code, i´ve got a "Found 4-bit latch for signal<aux2>."

i need that aux2 hold the valor on the else statement, and i don´t know how to make the latch disappear,i´ve already tried of several ways but the latch still exist

If you don´t understand something(i´m portuguese), please ask
Thanks

[jeppe]

process(aux,flag_acabou,reset,soc)
begin
    aux2<=aux;  -- THIS SHOULD SOLVE YOUR PROBLEM called implied latches
    count<=aux;
    if (flag_acabou='1')then
         saida<=aux;
         aux2<=aux;
    else
         saida<=aux2;--delete latch of saida, saida is an out signal
     end if;
     if(reset='1')then
          saida<="0000";
     end if;
    if(soc='0')then
         saida<="0000";
         count<="0000";
     end if;
end process;"

Your welcome
Jeppe