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Jerry Coffin
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      06-11-2008
In article <g2p47e$1d1q$(E-Mail Removed)-freiberg.de>, http://www.velocityreviews.com/forums/(E-Mail Removed)-
halle.de says...

[ ... ]

> Thats entirely the point. The compiler *shouldn't* do anything
> that we don't want him to do. Why would we create a test case
> that probably destroys our interesting part by unpredictable
> *global* optimizations? So the indirect call served exactly
> the purpose intended by me. Fine.


In that case, it appears that your purpose was to "prove" a foregone
conclusion rather than to provide information that could possibly be of
use to anybody else.

> >> Why not to include some other data item in between?

> >
> > Because the OP specified exactly this structure as being what he cares
> > about.

>
> No, he used some symbolic code in order to make his point.
> He added even /and so on/ (whatever that means


So why do you assume that he must have been asking about something he
didn't even mention?

[ ... ]

> Thats not really conclusive for me. As you probably know, the scaled
> index variant (mov edi, DWORD PTR [ecx+esi*8+4]) uses at least one byte
> of opcode length more than the unscaled one (mov esi, DWORD PTR [ecx+4])
> according to the Intel instruction set manual. So your assertion
> might be probably wrong.


Well, at least you've had the courtesy to not draw a conclusion -- a
wise decision, since you don't seem to know much of what you're talking
about.

[ ... ]

> I'm not exactly sure if you are correct here but it reminds me
> somehow from the dark that the scaled address generation is ex-
> pensive until the Pentium or even P6 (frequent AGI stalls on the P5?).


Nonsense. AGI had to do with having two instructions in which a register
was the destination of one instruction, and then used as the source
address in the next. For example, code like:

mov ebx, 1234h
mov eax, [ebx]

would have caused an AGI stall between the two instructions. First of
all, however, the CPUs for which this is true are well and truly
obsolete -- even if you get your computers by dumpster diving, you're
going to end up with something much newer than this. Second, scaling the
address doesn't contribute to AGI stalls in any way.

[ ... ]

> > Pardon my being blunt, but "Nonsense". People who write compilers have
> > known about how to do this transformation for _years_. The reason they
> > don't do it (at least on the x86) is simple: it's no longer effective.

>
> Nice argument. As you know, there are some implementations of
> the x86 instruction set and from running the programs posted
> earlier I can see 10-25% difference on effectiveness between
> addressing modes with the same program on different cpus.
> And this *has* to do with the OP's question: will there
> be /bad performance/ or not.
>
> What exactly is the *Nonsense* you found out in your critic
> of my paragraph above?


The fact that when you get down to it, all you're doing is throwing
around FUD. You bring up things like AGI stalls and possible differences
in architecture, not because they're real but because you've apparently
reached a conclusion through prejudice and are doing whatever you can to
protect it.

It's certainly true that under some circumstance or other, you might see
some difference in speed between two loops that do the same thing -- but
this remains equally true whether one uses pointer-style notation and
the other subscripting notation, or both use the same notation. So far
you've provided precisely zero real support for the claim that one will
consistently execute more efficiently than the other. Quite the
contrary, I've proven that in the one case where there really was a
provable difference, it favored the one you said should be slower.

--
Later,
Jerry.

The universe is a figment of its own imagination.
 
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Mirco Wahab
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      06-11-2008
Jerry Coffin wrote:
> It's certainly true that under some circumstance or other, you might see
> some difference in speed between two loops that do the same thing -- but
> this remains equally true whether one uses pointer-style notation and
> the other subscripting notation, or both use the same notation. So far
> you've provided precisely zero real support for the claim that one will
> consistently execute more efficiently than the other. Quite the
> contrary, I've proven that in the one case where there really was a
> provable difference, it favored the one you said should be slower.


This makes not much sense if you don't read others results and/or
conclusions thoroughly and continue to repeat your assumptions
while throwing around accusations of 'prejudice' and use improper
wording.

Bye bye & thanks for your time spent

Mirco
 
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