simple project suggestions

hello

can anyone suggest asimple project idea that i can implement using VHDL with spartan3 FPGA board .......
i need it for my project
so simple explanation of the idea is prefered

miss zia

[miss zia]

i see that no one is replying

i really really need a help
just an idea

miss zia

[crabbedh]

Pretty hard to know what type and depth of project you are looking for..

I'll take a shot..

How about simulating the roll of 2 dice.. 7 LEDs can be configured on 4 registered outputs.. now this is not obvious unless you think about it and too lengthy to explain.. so you can put all 7 LEDs on 6 registered outputs.. Get hi-eff leds that only require 2-4mA.. Then create state machine that 'rolls'.. goes through a sequence that turns on the die in sequence..

Die are physically like:

0 0
0 0 0
0 0

You can then add another die.. add a switch.. when the switch is pressed the die rolls.. (you have an external clock).. when switch not pressed dice stay in their state..

Too simple a project?

crabbedh

[jeppe]

Try this:
http://www.jjmk.dk/MMMI/Logic_Proble...7Segm/No01.htm
Your welcome

jeppe

[gzidude]

Which spartan3 board do you have? It would help if we knew what goodies are already connected to your board so your project won't have to cost you anything extra.

gzidude

[miss zia]

thank you all

i managed to think of a traffic light cotroller
two highways and 2 sides(crossing)
but when i implement my code it won't traverse from state to another

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- Uncomment the following lines to use the declarations that are
-- provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity TLcontrol is
Port ( TLight1, TLight2, STLight2 : out std_logic_vector(2 downto 0) ;
STLight1 : out std_logic_vector(1 downto 0) ;
clk, s1, s0 : in std_logic);
end TLcontrol;

architecture tlcntroller of TLcontrol is
signal state: integer range 0 to 5:=0;
signal sel : std_logic_vector (1 downto 0);
signal TMshort, TMlong, timer: std_logic:='0';

begin
sel<=s1 & s0;
--process:


timingrocess(clk)
variable t1: integer range 0 to 100000000:=0;--for the short time delay."2s"
variable t2: integer range 0 to 1250000000:=0;--for the long time delay."25s"
begin
if(clk'event and clk='1')then
if(timer='1') then
if(t1=100000000) then
TMshort<='1';
t1:=0;
else
t1:=t1+1;
end if;--short
if(t2=1250000000) then
TMlong<='1';
t2:=0;
else
t2:=t2+1;
end if;--long
else
t1:=0;
t2:=0;
end if;--timer
end if;--clock
end process timing;

process (state, TMshort, TMlong, sel,clk, timer)
begin
if(clk'event and clk='1') then
case state is
when 0 =>
TLight1<="001";--green
TLight2<="001";--green
STLight1<="10";--red
STLight2<="100";--red
--update state2:
if(sel="00") then
state<=0;
elsif(sel="01" or sel="11") then
state<=1;
timer<='0';
elsif(sel="10") then
state<=5;
timer<='0';
end if;

when 1 =>
timer<='1';
TLight1<="001";--green
TLight2<="010";--yellow
STLight1<="10";--red
STLight2<="100";--red
--update state2:
if(TMshort='0') then
state<=1;
elsif(TMshort='1') then
if(sel="00") then
state<=0;
timer<='0';
else
state<=2;
timer<='0';
end if;
end if;

when 2 =>
timer<='1';
TLight1<="001";--green
TLight2<="100";--red
STLight1<="01";--green
STLight2<="100";--red
--update state2:
if(TMlong = '1')then
if(sel="00") then
state<=1;
timer<='0';
elsif(sel="01" or sel="11") then
state<=2;
elsif(sel="10") then
state<=3;
timer<='0';
end if;
else
state<=2;
end if;

when 3 =>
timer<='1';
TLight1<="010";--yellow
TLight2<="100";--red
STLight1<="10";--red
STLight2<="010";--yellow
--update state2:
if(TMshort='0') then
state<=3;
elsif(TMshort='1') then
state<=4;
timer<='0';
end if;

when 4 =>
timer<='1';
TLight1<="100";--red
TLight2<="100";--red
STLight1<="10";--red
STLight2<="001";--green
--update state2:
if(TMlong = '1')then
if(sel="00") then
state<=5;
timer<='0';
else
state<=4;
end if;
else
state<=4;
end if;

when 5 =>
timer<='1';
TLight1<="010";--yellow
TLight2<="010";--yellow
STLight1<="10";--red
STLight2<="010";--yellow
--update state2:
if(TMshort='0') then
state<=5;
elsif(TMshort='1') then
if(sel="00") then
state<=0;
else
state<=4;
timer<='0';
end if;
end if;
end if; --clock
end case;
end process;

end tlcntroller;


here is my code
can any one check it for me

i need to submit it on after tommorrow

miss zia