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VHDL - Comparing more than one bits?

 
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Old 05-28-2008, 12:52 PM   #1
Default Comparing more than one bits?



Hi

I wann do a simpe comparison, to see if 6 bits of my bus have a certain
value. However, the codefragmet below does not work to my surpirse.
Anyone an idea what I am missing? must be simple, the error message says
no feasable entries for infix op: =

if ( clk = '1' and clk'event ) then
if (data_bus(31 downto 26)="100011") then
...


Thanks in advance,
R.


Rob
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Old 05-28-2008, 02:32 PM   #2
rickman
 
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Default Re: Comparing more than one bits?
On May 28, 7:52 am, Rob <R...@yahoo.co.uk> wrote:
> Hi
>
> I wann do a simpe comparison, to see if 6 bits of my bus have a certain
> value. However, the codefragmet below does not work to my surpirse.
> Anyone an idea what I am missing? must be simple, the error message says
> no feasable entries for infix op: =
>
> if ( clk = '1' and clk'event ) then
> if (data_bus(31 downto 26)="100011") then
> ...
>
> Thanks in advance,
> R.


How is data_bus declared? If it is std_logic_vector, this looks good
to me. The error message is saying that it can't find a version of
'=' that uses the two operand types and produces a boolean which is
required by the IF. Did you include the libraries?

Rick


rickman
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Old 05-28-2008, 02:40 PM   #3
Rob
 
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Default Re: Comparing more than one bits?

>
> How is data_bus declared? If it is std_logic_vector, this looks good
> to me. The error message is saying that it can't find a version of
> '=' that uses the two operand types and produces a boolean which is
> required by the IF. Did you include the libraries?


It is declared as unsigned...so in this case I cant compare bitwise I
assume. But I could cast it to std_logic_vector, couldnt I?


Rob
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Old 05-28-2008, 03:19 PM   #4
rickman
 
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Default Re: Comparing more than one bits?
On May 28, 9:40 am, Rob <R...@yahoo.co.uk> wrote:
> > How is data_bus declared? If it is std_logic_vector, this looks good
> > to me. The error message is saying that it can't find a version of
> > '=' that uses the two operand types and produces a boolean which is
> > required by the IF. Did you include the libraries?

>
> It is declared as unsigned...so in this case I cant compare bitwise I
> assume. But I could cast it to std_logic_vector, couldnt I?


I didn't think that was necessary. unsigned is compatible with string
literals. No?

Rick


rickman
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