>I have a simple question, whats the best way of designing a lookup table
>which is 16 bit wide. It receives 4 input bits and depending of the
>values 1 bit will be selected for the output. As I have a 32 bit
>architecture, this kind of lookup table
>should have 32 instances in parallel. So I wonder what is the best
>option to implement this? I also need to configure these lookup tables
>before using them.
>
>Is the following approach feasable? I have one register that is 16 bits
>wide and which holds the value of my lookup table. Now I use 32 Muxes
>and each receives the 16 bits that are stored in the lookup register.
>Each mux has its own 4input selection signal, which consists of
>the corresponing bits of the registers, and outputs the the
>corresponding bit. So I would need quite a lot of muxes, it is maybe
>better to have 32 16bit lookup tables in parallel and read there
>directly the value out?
You should express the problem abstractly for maximum clarity (e.g. in
VHDL) and trust to the compiler to provide an efficient implementation
in the target technology. For example, a 16element lookup table
yielding a one bit result is likely to be implemented as a single
"logic element" in current technologies. But this implementation
detail should not concern you, unless you need to squeeze out the
maximum performance. Even then, it's not clear that you will excel
the standard tools.
In brief, don't think in terms of lookup tables and multiplexers.
Think in terms of the abstract facilities provided by the design
language which you have chosen, since it's more likely that these can
express clearly the problem which you are solving. In the current
pretentious terminology, they are closer to the "problem domain".
Mike
