Velocity Reviews > VHDL > sine and cosine wave generation

# sine and cosine wave generation

FPGA
Guest
Posts: n/a

 01-14-2008
Can anyone give guidelines on how to generate sine and cosine wave in
VHDL?

Jon Beniston
Guest
Posts: n/a

 01-14-2008
On 14 Jan, 15:36, FPGA <(E-Mail Removed)> wrote:
> Can anyone give guidelines on how to generate sine and cosine wave in
> VHDL?

Use a look-up table.

Cheers,
Jon

Ralf Hildebrandt
Guest
Posts: n/a

 01-14-2008
FPGA schrieb:
> Can anyone give guidelines on how to generate sine and cosine wave in
> VHDL?

A very common technique is a look-up table.

Ralf

FPGA
Guest
Posts: n/a

 01-14-2008
On Jan 14, 10:43*am, Ralf Hildebrandt <(E-Mail Removed)> wrote:
> FPGA schrieb:
>
> > Can anyone give guidelines on how to generate sine and cosine wave in
> > VHDL?

>
> A very common technique is a look-up table.
>
> Ralf

Could you please explain in more detail

Kris Vorwerk
Guest
Posts: n/a

 01-14-2008
On Jan 14, 7:47 am, FPGA <(E-Mail Removed)> wrote:

> Could you please explain in more detail

http://www.actel.com/documents/Fusion_Waveform_TB.pdf

K.

comp.arch.fpga
Guest
Posts: n/a

 01-14-2008
On 14 Jan., 16:36, FPGA <(E-Mail Removed)> wrote:
> Can anyone give guidelines on how to generate sine and cosine wave in
> VHDL?

You can build a numerical oscillator:

Initialization:
sin[0] = 1;
cos[0] = 0;

Iteration:
sin[t] = sin[t-1]-cos[t-1]*k;
cos[t] = cos[t-1]+sin[t-1]*k;

The Frequency depends on k. If k is 1/2**k you do not even net a
multiplier.

This only works for a continues sequence of values. If you need values
in random
order you must use a lookup table or CORDIC. Both are available as
cores in ISE.

Kolja Sulimma
cronologic ohg

Symon
Guest
Posts: n/a

 01-14-2008

"FPGA" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed)...
> Can anyone give guidelines on how to generate sine and cosine wave in
> VHDL?

library IEEE;
use IEEE.MATH_REAL.all;
signal x,y : real;begin x <= sin(y);end;HTH., Syms.

Arlet Ottens
Guest
Posts: n/a

 01-14-2008
comp.arch.fpga wrote:
> On 14 Jan., 16:36, FPGA <(E-Mail Removed)> wrote:
>> Can anyone give guidelines on how to generate sine and cosine wave in
>> VHDL?

>
> You can build a numerical oscillator:
>
> Initialization:
> sin[0] = 1;
> cos[0] = 0;
>
> Iteration:
> sin[t] = sin[t-1]-cos[t-1]*k;
> cos[t] = cos[t-1]+sin[t-1]*k;
>
> The Frequency depends on k. If k is 1/2**k you do not even net a
> multiplier.
>
> This only works for a continues sequence of values. If you need values
> in random
> order you must use a lookup table or CORDIC. Both are available as
> cores in ISE.
>
> Kolja Sulimma
> cronologic ohg

If you slightly modify the iteration, like this:

sin[t] = sin[t-1] - cos[t-1] * k;
cos[t] = cos[t-1] + sin[t] * k;

then the solution doesn't suffer from accumulating rounding errors, at
the cost of some distortion.

FPGA
Guest
Posts: n/a

 01-14-2008
On Jan 14, 1:38*pm, Arlet Ottens <(E-Mail Removed)> wrote:
> comp.arch.fpga wrote:
> > On 14 Jan., 16:36, FPGA <(E-Mail Removed)> wrote:
> >> Can anyone give guidelines on how to generate sine and cosine wave in
> >> VHDL?

>
> > You can build a numerical oscillator:

>
> > Initialization:
> > sin[0] = 1;
> > cos[0] = 0;

>
> > Iteration:
> > sin[t] = sin[t-1]-cos[t-1]*k;
> > cos[t] = cos[t-1]+sin[t-1]*k;

>
> > The Frequency depends on k. If k is 1/2**k you do not even net a
> > multiplier.

>
> > This only works for a continues sequence of values. If you need values
> > in random
> > order you must use a lookup table or CORDIC. Both are available as
> > cores in ISE.

>
> > Kolja Sulimma
> > cronologic ohg

>
> If you slightly modify the iteration, like this:
>
> sin[t] = sin[t-1] - cos[t-1] * k;
> cos[t] = cos[t-1] + sin[t] * k;
>
> then the solution doesn't suffer from accumulating rounding errors, at
> the cost of some distortion.- Hide quoted text -
>
> - Show quoted text -