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VHDL - a unsupported feature error problem for help

 
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Old 03-30-2006, 04:49 AM   #1
Default a unsupported feature error problem for help


hi all:
i have been trapped for a VHDL problem.
it look like very simple, but i really can't fix it. please give me a
hand.
the problem is: i want a process wait a constant period about 100000ns.
i write
" wait for 100000ns; "
but it give me error like,
" unsupported feature error: condition clause and timeout clause
together in a wait statment is not support "

my whole code is:

LIBRARY ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;

ENTITY decode1 IS
PORT(
clk, hold, data0, data1 : in std_logic;
UID : OUT STD_LOGIC;
BIT0_STATE : OUT STD_LOGIC;
BIT25_STATE : OUT STD_LOGIC);
END decode1;

ARCHITECTURE a OF decode1 IS

BEGIN

PROCESS(clk)
BEGIN
if hold = '0' then
if (clk'event and clk='0') then
if data0 = '0' then BIT0_STATE <= '0';
elsif data1 = '0' then BIT0_STATE <= '1';
end if;
end if;
end if;
end process;

PROCESS(clk)

BEGIN
if hold = '0' then
wait for 100000 ns;
if (clk'event and clk='0') then
if data0 = '0' then uid <= '0';
elsif data1 = '0' then uid <= '1';
end if;
end if;
end if;
end process;

PROCESS(clk)

BEGIN
if hold = '0' then
wait for 8400000 ns;
if (clk'event and clk='0') then
if data0 = '0' then BIT25_STATE <= '0';
elsif data1 = '0' then BIT25_STATE <= '1';
end if;
end if;
end if;
end process;
END a;



ariesxyg@yahoo.com.cn
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Old 03-30-2006, 12:00 PM   #2
Marcus Harnisch
 
Posts: n/a
Default Re: a unsupported feature error problem for help
writes:

> " wait for 100000ns; "
> but it give me error like,
> " unsupported feature error: condition clause and timeout clause
> together in a wait statment is not support "
>
> [...]
>
> PROCESS(clk)
>
> BEGIN
> if hold = '0' then
> wait for 100000 ns;
> if (clk'event and clk='0') then
> if data0 = '0' then uid <= '0';
> elsif data1 = '0' then uid <= '1';
> end if;
> end if;
> end if;
> end process;


You cannot have a wait statement in a process with sensitivity list.

-- Marcus


Marcus Harnisch
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Old 03-30-2006, 07:43 PM   #3
Dave Pollum
 
Posts: n/a
Default Re: a unsupported feature error problem for help
wrote:
> hi all:
> i have been trapped for a VHDL problem.
> it look like very simple, but i really can't fix it. please give me a
> hand.
> the problem is: i want a process wait a constant period about 100000ns.
> i write
> " wait for 100000ns; "
> but it give me error like,
> " unsupported feature error: condition clause and timeout clause
> together in a wait statment is not support "
>
> my whole code is:
>
> LIBRARY ieee;
> use ieee.std_logic_1164.all;
> use ieee.std_logic_unsigned.all;
> use ieee.std_logic_arith.all;
>
> ENTITY decode1 IS
> PORT(
> clk, hold, data0, data1 : in std_logic;
> UID : OUT STD_LOGIC;
> BIT0_STATE : OUT STD_LOGIC;
> BIT25_STATE : OUT STD_LOGIC);
> END decode1;
>
> ARCHITECTURE a OF decode1 IS
>
> BEGIN
>
> PROCESS(clk)
> BEGIN
> if hold = '0' then
> if (clk'event and clk='0') then
> if data0 = '0' then BIT0_STATE <= '0';
> elsif data1 = '0' then BIT0_STATE <= '1';
> end if;
> end if;
> end if;
> end process;
>
> PROCESS(clk)
>
> BEGIN
> if hold = '0' then
> wait for 100000 ns;
> if (clk'event and clk='0') then
> if data0 = '0' then uid <= '0';
> elsif data1 = '0' then uid <= '1';
> end if;
> end if;
> end if;
> end process;
>
> PROCESS(clk)
>
> BEGIN
> if hold = '0' then
> wait for 8400000 ns;
> if (clk'event and clk='0') then
> if data0 = '0' then BIT25_STATE <= '0';
> elsif data1 = '0' then BIT25_STATE <= '1';
> end if;
> end if;
> end if;
> end process;
> END a;


"i want a process to wait a constant period about 100000ns"
While "WAIT FOR some_time_period" will work for simulation, it will
not be synthesized into hardware. You will need a clock and a counter.
HTH
-Dave Pollum



Dave Pollum
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