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How to specify a global package in Xilinx 8.1i

 
 
Weng Tianxiang
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      03-12-2006
Hi,
I need your help.

I have 4 vhdl source files:
A-Package.vhd;
A1.vhd;
A2.vhd;
A3.vhd;

A-Package.vhd is a package defining all common functions and constants
used for all other modules.

If the 4 files are in the above order, Modelsim runs them without any
errors.

But with Xilinx 8.1i, some parameters saved in A-Package.vhd file are
not referenced correctly in other modules.

Should I compile A-Package.vhd first as an independent project and then
what to do?

Thank you.

Weng

 
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Mike Treseler
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      03-12-2006
Weng Tianxiang wrote:

> If the 4 files are in the above order, Modelsim runs them without any
> errors.
> But with Xilinx 8.1i, some parameters saved in A-Package.vhd file are
> not referenced correctly in other modules.


Vendor library support files often have several
entities with the same name to support multiple device
families. Some package files have chicken-or-egg loops built in.
So you may have to figure out a workable order by trial and error,
or cut and past just the units you really need.

Or write your own code and
let synthesis worry about it.

-- Mike Treseler
 
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