Stimulus From VCD

Hi Group,

As part of out project simulations, we are required to provide digital
stimulus from a VCD file containing analog simulation O/P.

The VCD file contains "analog" data (real), so what I need to do is

- Parse the VCD file
- Convert the analog voltages to digital levels (0,1 or X)
- Apply them from my testbench.

I would prefer if all this could be acheived in VHDL, but any scripts
that do some (or all) of the above would be great.

Thanks,

Steven

moogyd@yahoo.co.uk

schrieb:

> The VCD file contains "analog" data (real), so what I need to do is
>
> - Parse the VCD file

This can be done with VHDL text I/O. I recommend to use the Unix/C
compatible libraries for that task, which makes things easier:
<http://bear.ces.case.edu/VHDL/index.html>.


> - Convert the analog voltages to digital levels (0,1 or X)

After parsing the data it is easy to make them digital.
Think about your requirements:
* Do you need filtering because of noisy signals?
* Do you need schmitt-trigger behavior?


> - Apply them from my testbench.

Read a line of VCD, parse it, convert the value to a digital signal and
assign it to a VHDL signal. Your testbench should read every line of the
file sequentially and then apply the stimuli or wait for some time.


> I would prefer if all this could be acheived in VHDL...

Yes, this is possible and not too challenging.

Ralf

Ralf Hildebrandt

wrote:
> Hi Group,
>
> As part of out project simulations, we are required to provide digital
> stimulus from a VCD file containing analog simulation O/P.

If this is to be applied using a mixed signal tester this not sensible.
A (possibly normalised) signal would be the most useful information. The
analogue stimulus would be loaded straight into an analogur instrument.

You can use the verilog system task realtobits to convert from a real
value to digital value.

>
> The VCD file contains "analog" data (real), so what I need to do is
>
> - Parse the VCD file
> - Convert the analog voltages to digital levels (0,1 or X)
> - Apply them from my testbench.
>
> I would prefer if all this could be acheived in VHDL, but any scripts
> that do some (or all) of the above would be great.
>
> Thanks,
>
> Steven

Andy Botterill