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Hi All,

Anybody familiar with matlab code auto-conversion to vhdl?

I want to implement a prototype of CIC filter in FPGA, so am using the FDA tool to generate vhdl code.

I am just following one demo from matlab, which is "Implementing the Filter Chain of Digital Down Convert in HDL" at Matlab Help/Demos/Toolboxes/Filter Design/Application Demos.

In this demo there are 3 stages. but I am only testing the 1st stage which is a CIC filter. After generating the CIC filter object by following the demo, I directly call the Generatehdl function (can be found at the bottom of the matlab demo file) to generate vhdl code. My matlab simulation on this CIC filter is correct but the vhdl code is wrong when simulated in ModelSim(the filter output from vhdl simulation is all 0s).

Just want to know, is the matlab hdl-conversion functionality trustable and reliable? what is the possible reason causing my vhdl code simulation wrong?

thank you